SOCKET CONNECTIONS AMONG PROCESSING-ELEMENT BANKS AND CHIPS

1 . A device comprising:

a first integrated circuit including:

a set of first banks, wherein each first bank includes an array of processing elements configured for single instruction, multiple data (SIMD) operations;

a set of first sockets, wherein each first socket is configurable to connect to any first bank selected from the set of first banks; and

a first external interface connected to the set of first sockets;

a second integrated circuit including:

a set of second banks, wherein each second bank includes an array of processing elements configured for SIMD operations;

a set of second sockets, wherein each second socket is configurable to connect to any second bank selected from the set of second banks; and

a second external interface connected to the set of second sockets;

wherein the first and second external interfaces are connected; and

wherein each first socket is connectable, via the first and second external interfaces, to each second socket to communicate credit in a direction between a first bank and a second bank and to communicate data in an opposite direction between the first bank and the second bank.

2 . The device of claim 1 , wherein each first socket comprises a controller configured to connect the first socket to a selected first bank of the set of first banks.

3 . The device of claim 2 , wherein each second socket comprises a controller configured to connect the second socket to a selected second bank of the set of second banks.

4 . The device of claim 3 , wherein each first socket further comprises a buffer to store data communicated between the first bank and the second bank.

5 . The device of claim 4 , wherein each second socket further comprises a buffer to store data communicated between the first bank and the second bank.

6 . The device of claim 5 , wherein each first socket further comprises a credit logic to track credit communicated between the first bank and the second bank.

7 . The device of claim 6 , wherein each second socket further comprises a credit logic to track credit communicated between the first bank and the second bank.

8 . The device of claim 1 , wherein the first integrated circuit further comprises a first bus connecting the set of first banks to the set of first sockets.

9 . The device of claim 8 , wherein the second integrated circuit further comprises a second bus connecting the set of second banks to the set of second sockets.

10 . The device of claim 8 , wherein the second integrated circuit further comprises:

a set of third banks, wherein each third bank includes an array of processing elements configured for SIMD operations;

a set of third sockets, wherein each third socket is configurable to connect to any third bank selected from the set of third banks; and

a third external interface connected to the set of third sockets;

wherein the set of third sockets is connected to the second bus; and

wherein the second bus provides communication among the set of second banks, the set of second sockets, the set of third banks, and the set of third sockets.

11 . A device comprising:

a plurality of integrated circuits, each integrated circuit including:

a set of banks, wherein each bank includes an array of processing elements configured for single instruction, multiple data (SIMD) operations;

a set of sockets, wherein each socket is configurable to connect to any bank selected from the set of banks; and

an external interface connected to the set of sockets;

wherein at least two external interfaces of respective integrated circuits are connected for bidirectional communication between the respective integrated circuits; and

wherein respective sockets of the respective integrated circuits are connectable to exchange credit for data between two respective banks.

12 . The device of claim 11 , wherein each socket comprises a controller configured to program the socket to connect to a selected bank of the set of banks.

13 . The device of claim 12 , wherein each socket further comprises a buffer to store data communicated between the first bank and the second bank.

14 . The device of claim 13 , wherein each socket further comprises a credit logic to count credit communicated between the first bank and the second bank.

15 . The device of claim 11 , wherein each integrated circuit further comprises a bus connecting the set of banks to the set of sockets.

16 . The device of claim 11 , further comprising a high-speed bus to provide the bidirectional communication between the respective integrated circuits.