IP Library Patent Application 18679930
Patent Application
App. No. 18/679,930

MULTIPLY ACCUMULATE (MAC) UNIT WITH SPLIT ACCUMULATOR

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Quick Facts
Patent No.
US None
App. No.
18/679,930
Abstract

In a multiply accumulate (MAC) unit, an accumulator may be implemented in two or more stages. For example, a first accumulator may accumulate products from the multiplier of the MAC unit, and a second accumulator may periodically accumulate the running total of the first accumulator. Each time the first accumulator's running total is accumulated by the second accumulator, the first accumulator may be initialized to begin a new accumulation period. In one embodiment, the number of values accumulated by the first accumulator within an accumulation period may be a user-adjustable parameter. In one embodiment, the bit width of the input of the second accumulator may be greater than the bit width of the output of the first accumulator. In another embodiment, an adder may be shared between the first and second accumulators, and a multiplexor may switch the accumulation operations between the first and second accumulators.

Claims (28)

1 . A device, comprising:

a multiplier;

a first accumulator configured to accumulate an output of the multiplier; and

a second accumulator configured to accumulate an output of the first accumulator,

wherein a bit width of an input of the second accumulator is greater than a bit width of the output of the first accumulator.

2 . The device of claim 1 , further comprising a controller configured to control the first accumulator and the second accumulator so that at any moment in time at most one of the first or second accumulators is performing an accumulation operation.

3 . The device of claim 1 , further comprising a controller configured to initialize the first accumulator immediately after the output of the first accumulator has been accumulated by the second accumulator.

4 . The device of claim 3 , wherein the first accumulator comprises an adder and initializing the first accumulator comprises setting an input of the adder to a zero value.

5 . The device of claim 3 , wherein the first accumulator comprises a storage element and initializing the first accumulator comprises storing a zero value in the storage element.

6 . The device of claim 1 , wherein the controller is configured to initialize the second accumulator immediately after an output of the second accumulator has been written to a memory.

7 . The device of claim 6 , wherein the second accumulator comprises an adder and initializing the second accumulator comprises setting an input of the adder to a zero value.

8 . The device of claim 6 , wherein the second accumulator comprises a storage element and initializing the second accumulator comprises storing a zero value in the storage element.

9 . The device of claim 1 , wherein the first accumulator comprises a first adder, and the second accumulator comprises a second adder, and wherein a bit width of the second adder is greater than a bit width of the first adder.

10 . The device of claim 1 , further comprising a third accumulator configured to accumulate an output of the second accumulator, wherein a bit width of an input of the third accumulator is greater than a bit width of the output of the second accumulator.

11 . A method, comprising:

multiplying, by a multiplier, two values;

accumulating, by a first accumulator, an output of the multiplier; and

accumulating, by a second accumulator, an output of the first accumulator,

wherein a bit width of an input of the second accumulator is greater than a bit width of the output of the first accumulator.

12 . The method of claim 11 , further comprising controlling, by a controller, the first accumulator and the second accumulator so that at any moment in time at most one of the first or second accumulators is performing an accumulation operation.

13 . The method of claim 11 , further comprising initializing, by a controller, the first accumulator immediately after the output of the first accumulator has been accumulated by the second accumulator.

14 . The method of claim 13 , wherein the first accumulator comprises an adder, and initializing the first accumulator comprises setting an input of the adder to a zero value.

15 . The method of claim 13 , wherein the first accumulator comprises a storage element, and initializing the first accumulator comprises storing a zero value in the storage element.

16 . The method of claim 11 , further comprising initializing, by the controller, the second accumulator immediately after the output of the second accumulator has been written to a memory.

17 . The method of claim 16 , wherein the second accumulator comprises an adder, and initializing the second accumulator comprises setting an input of the second accumulator to a zero value.

18 . The method of claim 16 , wherein the second accumulator comprises a storage element, and initializing the second accumulator comprises storing a zero value in the storage element.

19 . The method of claim 11 , further comprising accumulating, by a third accumulator, an output of the second accumulator, wherein a bit width of an input of the third accumulator is greater than a bit width of the output of the second accumulator.

20 . The method of claim 11 , wherein an output of the second accumulator is stored at a memory element while the first accumulator is accumulating the output of the multiplier.

Assignments (3)
CHANGE OF NAME Recorded Sep 11, 2025
From: RECOGNI INC.
To: TENSORDYNE, INC.
Reel/Frame 072859/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2024
From: GOLDMAN, GARY S.
To: RECOGNI INC.
Reel/Frame 067584/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2024
From: HUANG, JIAN HUI
To: RECOGNI INC.
Reel/Frame 067584/0364 →