Replay protected memory block data frame
View Patent ↗Devices and techniques are disclosed herein for providing an improved Replay Protected Memory Block (RPMB) data frame and command queue for communication between a host device and a memory device.
1 . A memory device, comprising:
non-volatile memory; and
control circuitry configured to receive commands from a host device, wherein the received commands comprise Replay Protected Memory Block (RPMB) commands comprising RPMB read or write commands in an RPMB command queue to be performed on the non-volatile memory of the memory device, wherein the RPMB commands comprise a field indicating a block count field indicating a number of 4 kB blocks to be read or written by a respective command, wherein the RPMB command queue comprises multiple entries including a queued RPMB read command and one or more RPMB write commands, and the control circuitry is configured to pre-fetch read data from a read address associated with the queued RPMB read command out of order with respect to one or more RPMB write commands while executing a current entry in the RPMB command queue.
2 . The memory device of claim 1 , wherein the RPMB commands do not comprise stuff bytes in the RPMB commands.
3 . The memory device of claim 1 , wherein a length of a message of the RPMB command is variable between a first RPMB command and a second RPMB command.
4 . The memory device of claim 1 , wherein the non-volatile memory comprises flash memory.
5 . The memory device of claim 1 , wherein the control circuitry comprises a command queue configured to store RPMB commands to enable the control circuitry to perform the RPMB commands in an order other than in which the RPMB commands are received.
6 . The memory device of claim 1 , wherein the RPMB commands comprise a request message type/response message type field that indicates a type of message or request contained in a respective RPMB message and comprises a length of 2 bytes.
7 . The memory device of claim 1 , wherein the RPMB commands comprise a nonce field that comprises a length of 16 bytes.
8 . The memory device of claim 1 , wherein the RPMB commands comprise an address field that indicates an address and comprises a length of 2 bytes.
9 . The memory device of claim 1 , wherein the RPMB commands comprise a write counter field.
10 . The memory device of claim 9 , wherein the write counter field comprises a length of 4 bytes.
11 . The memory device of claim 1 , wherein the RPMB commands comprise a result field that indicates a result of the respective RPMB command and comprises a length of 2 bytes.
12 . A system, comprising:
a processor; and
a memory device coupled to the processor and comprising:
non-volatile memory; and
control circuitry configured to receive commands from the processor, wherein the received commands comprise Replay Protected Memory Block (RPMB) commands in an RPMB command queue comprising RPMB read or write commands to be performed on the non-volatile memory of the memory device, wherein the RPMB commands comprise a field indicating a block count field indicating a number of 4 kB blocks to be read or written by a respective command, wherein the RPMB command queue comprises multiple entries including a queued RPMB read command and one or more RPMB write commands, and the control circuitry is configured to pre-fetch read data from a read address associated with the queued RPMB read command out of order with respect to one or more RPMB write commands while executing a current entry in the RPMB command queue.
13 . The system of claim 12 , wherein the RPMB commands do not comprise stuff bytes in the RPMB commands.
14 . The system of claim 12 , wherein a length of a message of the RPMB command is variable between a first RPMB command and a second RPMB command.
15 . The system of claim 12 , wherein the non-volatile memory comprises flash memory.
16 . The system of claim 12 , wherein the RPMB commands comprise a request message type/response message type field that indicates a type of message or request contained in a respective RPMB message and comprises a length of 2 bytes.
17 . The system of claim 16 , wherein the RPMB commands comprise a nonce field that comprises a length of 16 bytes.
18 . The system of claim 17 , wherein the RPMB commands comprise:
an address field that indicates an address and comprises a length of 2 bytes;
a write counter field that comprises a length of 4 bytes; and
a result field that indicates a result of the respective RPMB command and comprises a length of 2 bytes.
19 . A method, comprising:
receiving, at control circuitry of a memory device, a Replay Protected Memory Block (RPMB) command from a host device, wherein the RPMB command comprises a data frame that comprises a block count field indicating a number of 4 kB blocks to be read or written by a respective command and does not comprise any stuff bytes;
queueing the received RPMB command a command queue, wherein the command queue comprises a queued RPMB read command and one or more RPMB write commands; and
performing, using the control circuitry of the memory device, the RPMB command by reading data from a read address associated with the RPMB command, wherein performing the RPMB command comprises pre-fetching read data from a read address associated with the queued RPMB read command out of order with respect to one or more RPMB write commands while executing a current entry in the RPMB command queue.
20 . The method of claim 19 , comprising queueing the RPMB command in a command queue of the control circuitry to enable the control circuitry to perform RPMB commands in an order other than in which the RPMB commands are received.