USING STATEFUL TRAFFIC MANAGEMENT DATA TO PERFORM PACKET PROCESSING
Some embodiments provide a method for an ingress packet processing pipeline of a network forwarding integrated circuit (IC). The ingress packet processing pipeline is for receiving packets from a port of the network forwarding IC and processing the packets to assign different packets to different queues of a traffic management unit of the network forwarding IC. The method receives state data from the traffic management unit. The method stores the state data in a stateful table. The method assigns a particular packet to a particular queue based on the state data received from the traffic management unit and stored in the stateful table.
1 . An integrated circuit to be used in network forwarding operations associated with at least one network destination in a network, the integrated circuit comprising:
configurable pipeline circuitry to be used in packet data processing; and
traffic manager circuitry to be used in packet data queuing/dequeuing associated with the configurable pipeline circuitry;
wherein:
the packet data processing is to be based, at least in part, upon match table data that is configurable to comprise Ternary Content-Addressable Memory (TCAM) match table data and/or exact match table data;
the integrated circuit is configurable to generate queue state data:
in response, at least in part, to the packet data queuing/dequeuing by the traffic manager circuitry; and
based upon queue occupancy information and/or queue identification data;
the integrated circuit is configurable to perform at least one congestion-related packet data processing decision based upon the queue state data; and
the at least one congestion-related packet data processing decision is configurable to comprise at least one packet data queue/drop decision.
2 . The integrated circuit of claim 1 , wherein:
the queue state data is to be used in association with at least one mapping that is based upon memory location data and the queue identification data.
3 . The integrated circuit of claim 1 , wherein:
the configurable pipeline circuitry is configurable to use the queue state data in association with at least one flow-related statistical determination.
4 . The integrated circuit of claim 1 , wherein:
the queue occupancy information indicates one or more of:
queue depth information; and/or
buffer usage information.
5 . The integrated circuit of claim 1 , wherein:
the at least one congestion-related packet data processing decision is configurable to comprise one or more of:
at least one queue re-assignment decision; and/or
at least one threshold-based queue/drop decision.
6 . The integrated circuit of claim 1 , wherein:
the integrated circuit also comprises:
switch fabric and replication circuitry for use in:
the packet data queuing/dequeuing; and/or
packet data replication for use in packet data broadcast or multicast.
7 . At least one non-transitory memory storing instructions for being executed by an integrated circuit, the integrated circuit to be used in network forwarding operations associated with at least one network destination in a network, the integrated circuit comprising configurable pipeline circuitry and traffic manager circuitry, the instructions, when executed by the integrated circuit, resulting in the integrated circuit being configured to perform operations comprising:
performing, by the configurable pipeline circuitry, packet data processing; and
performing, by the traffic manager circuitry, packet data queuing/dequeuing associated with the configurable pipeline circuitry;
wherein:
the packet data processing is to be based, at least in part, upon match table data that is configurable to comprise Ternary Content-Addressable Memory (TCAM) match table data and/or exact match table data;
the integrated circuit is configurable to generate queue state data:
in response, at least in part, to the packet data queuing/dequeuing by the traffic manager circuitry; and
based upon queue occupancy information and/or queue identification data;
the integrated circuit is configurable to perform at least one congestion-related packet data processing decision based upon the queue state data; and
the at least one congestion-related packet data processing decision is configurable to comprise at least one packet data queue/drop decision.
8 . The at least one non-transitory memory of claim 7 , wherein:
the queue state data is to be used in association with at least one mapping that is based upon memory location data and the queue identification data.
9 . The at least one non-transitory memory of claim 7 , wherein:
the configurable pipeline circuitry is configurable to use the queue state data in association with at least one flow-related statistical determination.
10 . The at least one non-transitory memory of claim 7 , wherein:
the queue occupancy information indicates one or more of:
queue depth information; and/or
buffer usage information.
11 . The at least one non-transitory memory of claim 7 , wherein:
the at least one congestion-related packet data processing decision is configurable to comprise one or more of:
at least one queue re-assignment decision; and/or
at least one threshold-based queue/drop decision.
12 . The at least one non-transitory memory of claim 7 , wherein:
the integrated circuit also comprises:
switch fabric and replication circuitry for use in:
the packet data queuing/dequeuing; and/or
packet data replication for use in packet data broadcast or multicast.
13 . A method implemented using an integrated circuit, the integrated circuit to be used in network forwarding operations associated with at least one network destination in a network, the integrated circuit comprising configurable pipeline circuitry and traffic manager circuitry, the method comprising:
performing, by the configurable pipeline circuitry, packet data processing; and
performing, by the traffic manager circuitry, packet data queuing/dequeuing associated with the configurable pipeline circuitry;
wherein:
the packet data processing is to be based, at least in part, upon match table data that is configurable to comprise Ternary Content-Addressable Memory (TCAM) match table data and/or exact match table data;
the integrated circuit is configurable to generate queue state data:
in response, at least in part, to the packet data queuing/dequeuing by the traffic manager circuitry; and
based upon queue occupancy information and/or queue identification data;
the integrated circuit is configurable to perform at least one congestion-related packet data processing decision based upon the queue state data; and
the at least one congestion-related packet data processing decision is configurable to comprise at least one packet data queue/drop decision.
14 . The method of claim 13 , wherein:
the queue state data is to be used in association with at least one mapping that is based upon memory location data and the queue identification data.
15 . The method of claim 13 , wherein:
the configurable pipeline circuitry is configurable to use the queue state data in association with at least one flow-related statistical determination.
16 . The method of claim 13 , wherein:
the queue occupancy information indicates one or more of:
queue depth information; and/or
buffer usage information.
17 . The method of claim 13 , wherein:
the at least one congestion-related packet data processing decision is configurable to comprise one or more of:
at least one queue re-assignment decision; and/or
at least one threshold-based queue/drop decision.
18 . The method of claim 13 , wherein:
the integrated circuit also comprises:
switch fabric and replication circuitry for use in:
the packet data queuing/dequeuing; and/or
packet data replication for use in packet data broadcast or multicast.
19 . Network forwarding circuitry to be used in network forwarding operations associated with at least one network destination in a network, the network forwarding circuitry comprising:
ports to be communicatively coupled to the network; and
an integrated circuit communicatively coupled to the ports, the integrated circuit comprising:
configurable pipeline circuitry to be used in packet data processing; and
traffic manager circuitry to be used in packet data queuing/dequeuing associated with the configurable pipeline circuitry;
wherein:
the packet data processing is to be based, at least in part, upon match table data that is configurable to comprise Ternary Content-Addressable Memory (TCAM) match table data and/or exact match table data;
the integrated circuit is configurable to generate queue state data:
in response, at least in part, to the packet data queuing/dequeuing by the traffic manager circuitry; and
based upon queue occupancy information and/or queue identification data;
the integrated circuit is configurable to perform at least one congestion-related packet data processing decision based upon the queue state data; and
the at least one congestion-related packet data processing decision is configurable to comprise at least one packet data queue/drop decision.
20 . The network forwarding circuitry of claim 19 , wherein:
the queue state data is to be used in association with at least one mapping that is based upon memory location data and the queue identification data.
21 . The network forwarding circuitry of claim 19 , wherein:
the configurable pipeline circuitry is configurable to use the queue state data in association with at least one flow-related statistical determination.
22 . The network forwarding circuitry of claim 19 , wherein:
the queue occupancy information indicates one or more of:
queue depth information; and/or
buffer usage information.
23 . The network forwarding circuitry of claim 19 , wherein:
the at least one congestion-related packet data processing decision is configurable to comprise one or more of:
at least one queue re-assignment decision; and/or
at least one threshold-based queue/drop decision.
24 . The network forwarding circuitry of claim 19 , wherein:
the integrated circuit also comprises:
switch fabric and replication circuitry for use in:
the packet data queuing/dequeuing; and/or
packet data replication for use in packet data broadcast or multicast.