NFC DEMODULATION CIRCUIT
An amplification circuit includes an amplifier circuit (provided by an operational amplifier) that amplifies a signal to be demodulated. A feedback loop of the amplification circuit has a resistance value that is controlled to discretely vary according to a level of an output node of the amplifier circuit. A comparison of the output level with respect to one or a plurality of thresholds, which define out-of-saturation operating ranges of the amplifier circuit, drives selection of the resistance value.
1 . An amplification circuit, comprising:
an amplifier circuit including an operational amplifier, said amplifier circuit configured to amplify a signal to be demodulated; and
a feedback loop having a resistance value discretely varying according to a level of an output node of said amplifier circuit with respect to one or a plurality of thresholds defining one or a plurality of out-of-saturation operating ranges of the amplifier circuit.
2 . The amplification circuit according to claim 1 , wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a first resistance value when said level is higher than a first threshold or when said level is lower than a second threshold, where the second threshold is lower than the first threshold.
3 . The amplification circuit according to claim 2 , wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a second resistance value when said level is between the first threshold and the second threshold.
4 . The amplification circuit according to claim 3 , wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a third resistance value when said level is higher than a third threshold, wherein the third threshold is higher than the first threshold, or when said level is lower than a fourth threshold, wherein the fourth threshold is lower than the second threshold.
5 . The amplification circuit according to claim 1 , wherein the operational amplifier comprises an inverting input coupled to an input node of the amplifier circuit and coupled to the output node of the amplifier circuit via the feedback loop.
6 . The amplification circuit according to claim 5 , wherein said feedback loop comprises:
a first branch coupling the inverting input of the operational amplifier to the output node, said first branch including a resistive element having a first resistance value;
N additional branches coupled in parallel with the first branch, wherein each additional branch includes a resistive element in series with a switch controlled by a respective control signal, N being a positive integer;
said respective control signal being dependent on a comparison between the level of the output node of said amplifier circuit with respect to a respective operating range from among N out-of-saturation operating ranges of the amplifier circuit, each operating range being defined by thresholds; and
N comparison circuits configured to generate a respective control signal for each of the N additional branches to make the respective switch:
non-conductive when the level of the output node of the amplifier circuit is in the respective operating range; and
conductive when the level of the output node of the amplifier circuit is outside of said respective operating range.
7 . The amplification circuit according to claim 6 :
wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a first resistance value when said level is higher than a first threshold or when said level is lower than a second threshold, where the second threshold is lower than the first threshold; and
wherein the N=1 out-of-saturation operating range is defined between the first threshold and the second threshold and the N=1 branch is formed of a resistive element having a fourth resistance value.
8 . The amplification circuit according to claim 7 , further comprising a flip-flop having:
a set input coupled to the output node of the comparator circuit of the first branch of the first comparison circuit;
a reset input coupled to the output node of the inverter circuit of the second branch of the first comparison circuit; and
an output coupled to an output node of the amplification circuit via an inverter circuit.
9 . The amplification circuit according to claim 7 , wherein a first comparison circuit from among the N comparison circuits comprises:
a first comparison branch comprising a comparator circuit having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the first threshold;
a second comparison branch comprising a comparator circuit, having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the second threshold, in series with an inverter circuit; and
a logic block configured to perform an OR function based on a signal present on an output node of the comparator circuit of the first branch of the first comparison circuit and another signal present on an output node of the inverter circuit of the second branch of the first comparison circuit;
an output of the logic block being the control signal of the switch of the N=1 branch of the feedback loop.
10 . The amplification circuit according to claim 9 :
wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a second resistance value when said level is between the first threshold and the second threshold;
wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a third resistance value when said level is higher than a third threshold, wherein the third threshold is higher than the first threshold, or when said level is lower than a fourth threshold, wherein the fourth threshold is lower than the second threshold; and
wherein the N=2 out-of-saturation operating range is defined between the third and fourth thresholds and the N=2 branch is formed of a resistive element having a fifth resistance value.
11 . The amplification circuit according to claim 10 , wherein a first comparison circuit from among the N comparison circuits comprises:
a first comparison branch comprising a comparator circuit having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the first threshold;
a second comparison branch comprising a comparator circuit, having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the second threshold, in series with an inverter circuit; and
a logic block configured to perform an OR function based on a signal present on an output node of the comparator circuit of the first branch of the first comparison circuit and another signal present on an output node of the inverter circuit of the second branch of the first comparison circuit;
an output of the logic block being the control signal of the switch of the N=1 branch of the feedback loop.
12 . The amplification circuit according to claim 11 , wherein a second comparison circuit from among the N comparison circuits comprises:
a third comparison branch comprising a comparator circuit having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the third threshold;
a fourth comparison branch comprising a comparator circuit, having a non-inverting input coupled to the output node and an inverting input coupled to a node configured to receive a voltage representative of the fourth threshold, in series with another inverter circuit; and
another logic block configured to perform an OR function based on a signal present on an output node of the comparator circuit of the third branch of the second comparison circuit and another signal present at the output of the inverter circuit of the fourth branch of the second comparison circuit;
an output of said logic block being the signal for controlling the switch of the N=2 branch of the feedback loop.
13 . The amplification circuit according to claim 12 , further comprising a flip-flop having:
a set input coupled to the output node of the comparator circuit of the first branch of the first comparison circuit;
a reset input coupled to the output node of the inverter circuit of the second branch of the first comparison circuit; and
an output coupled to an output node of the amplification circuit via an inverter circuit.
14 . The amplification circuit according to claim 5 , wherein the inverting input of the operational amplifier is coupled to the input node of the amplifier circuit via a capacitive element in series with an input resistor.
15 . A demodulation circuit comprising the amplification circuit according to claim 1 .
16 . The demodulation circuit according to claim 15 , wherein the demodulation circuit is of NFC type.
17 . A near-field communication device comprising the demodulation circuit according to claim 15 .
18 . An amplification circuit, comprising:
an amplifier circuit configured to amplify a signal to be demodulated; and
a feedback loop coupled between and input node and output node of the amplifier circuit;
wherein the feedback loop has a resistance value discretely varying according to a level at the output node of said amplifier circuit with respect to one or a plurality of thresholds defining one or a plurality of out-of-saturation operating ranges of the amplifier circuit;
wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a first resistance value when said level is higher than a first threshold or when said level is lower than a second threshold, where the second threshold is lower than the first threshold; and
wherein said feedback loop comprises:
a first branch coupling the input node of the amplifier circuit to the output node, said first branch including a resistive element having a first resistance value;
N additional branches coupled in parallel with the first branch, wherein each additional branch includes a resistive element in series with a switch controlled by a respective control signal, N being a positive integer greater than two;
said respective control signal being dependent on a comparison between the level of the output node of said amplifier circuit with respect to a respective operating range from among N out-of-saturation operating ranges of the amplifier circuit, each operating range being defined by thresholds; and
N comparison circuits configured to generate a respective control signal for each of the N additional branches to make the respective switch:
non-conductive when the level of the output node of the amplifier circuit is in the respective operating range; and
conductive when the level of the output node of the amplifier circuit is outside of said respective operating range.
19 . The amplification circuit according to claim 18 , wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a second resistance value when said level is between the first threshold and the second threshold.
20 . The amplification circuit according to claim 19 , wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a third resistance value when said level is higher than a third threshold, wherein the third threshold is higher than the first threshold, or when said level is lower than a fourth threshold, wherein the fourth threshold is lower than the second threshold.
21 . The amplification circuit according to claim 20 :
wherein the resistance value of the feedback loop of the amplifier circuit is controlled to have a first resistance value when said level is higher than a first threshold or when said level is lower than a second threshold, where the second threshold is lower than the first threshold; and
wherein the N=1 out-of-saturation operating range is defined between the first threshold and the second threshold and the N=1 branch is formed of a resistive element having a fourth resistance value.