IP Library Granted Patent US 12,659,245
Granted Patent B2
US 12,659,245 · App. 18/856,664 · Granted Jun 16, 2026

Server delay control device, server delay control method and program

Inventors: Kei Fujimoto (Musashino, JP); Ko Natori (Musashino, JP)
Assignee: NTT, Inc.
H04L43/02G06F9/4812G06F9/545
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Quick Facts
Patent No.
US 12,659,245
App. No.
18/856,664
Granted
Jun 16, 2026
Kind
B2
Abstract

A server delay controller includes: a packet harvesting unit that refers to a packet held in a ring buffer when a packet arrives and executes harvesting to delete an entry of a corresponding queue from the ring buffer, a sleep management unit that puts the thread to sleep in a case in which a packet does not arrive for a predetermined period, and cancels the sleep of the thread through a hardware interrupt at the time of packet arrival, and an idle state recovery control unit that periodically wakes up the thread during sleep or wakes up the thread immediately before the packet arrival in accordance with a packet arrival timing.

Claims (47)

1 . A non-transitory computer-readable storage medium storing instructions that upon execution, cause a computer to operate as a server delay controller that is arranged in a kernel space of an operating system (OS) and starts a thread that monitors packet arrival using a polling model, wherein execution of the instructions causes the computer operating as the server delay controller to perform operations comprising:

monitoring a poll list that registers net device information indicating which device a hardware interrupt from an interface unit comes from;

referring to a packet held in a ring buffer when a packet arrives executing harvesting to delete an entry of a corresponding queue from the ring buffer;

putting the thread to sleep in a case in which a packet does not arrive for a predetermined period, and cancelling the sleep of the thread through a hardware interrupt at a time of packet arrival, and

periodically waking up the thread during sleep or wakes up the thread immediately before the packet arrival in accordance with a packet arrival timing.

2 . A non-transitory computer-readable storage medium storing instructions that upon execution, cause a computer to operate as a server delay controller that is arranged in a user space and starts a thread that monitors packet arrival using a polling model, wherein execution of the instructions causes the computer operating as the server delay controller to perform operations comprising:

monitoring packet arrival from an interface unit;

referring to a packet held in a ring buffer when a packet arrives and executing harvesting to delete an entry of a corresponding queue from the ring buffer;

putting the thread to sleep in a case in which a packet does not arrive for a predetermined period, and cancelling the sleep of the thread through a hardware interrupt at a time of packet arrival; and

periodically waking up the thread during sleep or waking up the thread immediately before the packet arrival in accordance with a packet arrival timing.

3 . A non-transitory computer-readable storage medium storing instructions that upon execution, cause a computer to operate as a server delay controller wherein

a guest operating system (OS) that operates in a virtual machine includes:

a kernel,

a ring buffer that is managed by the kernel in a memory space in a server including the guest OS,

a packet arrival monitoring unit that monitors packet arrival from an interface unit,

a packet harvesting unit that refers to a packet held in the ring buffer when a packet arrives and executes harvesting to delete an entry of a corresponding queue from the ring buffer,

a protocol processing unit that performs protocol processing on a packet on which harvesting has been executed, and

the server delay controller that starts a thread that monitors packet arrival using a polling model in the kernel, and

the server delay controller includes:

a sleep management unit that puts the thread to sleep in a case in which a packet does not arrive for a predetermined period, and cancels the sleep of the thread through a hardware interrupt at a time of packet arrival, and

an idle state recovery control unit that periodically wakes up the thread during sleep or wakes up the thread immediately before the packet arrival in accordance with a packet arrival timing.

4 . A non-transitory computer-readable storage medium storing instructions that upon execution, cause a computer to operate as a server delay controller wherein

a host OS in which a virtual machine and an external process formed outside the virtual machine can operate includes:

a kernel,

a ring buffer that is managed by the kernel in a memory space in a server including the host OS,

a packet arrival monitoring unit that monitors packet arrival from an interface unit,

a packet harvesting unit that refers to a packet held in the ring buffer when a packet arrives and executes harvesting to delete an entry of a corresponding queue from the ring buffer,

a tap that is a virtual interface created by the kernel, and

the server delay controller that starts a thread that monitors packet arrival using a polling model in the kernel, and

the server delay controller includes

a packet arrival monitoring unit that monitors a poll list that registers net device information indicating which device a hardware interrupt from the interface unit comes from,

a packet harvesting unit that refers to a packet held in a ring buffer when a packet arrives and executes harvesting to delete an entry of a corresponding queue from the ring buffer,

a sleep management unit that puts the thread to sleep in a case in which a packet does not arrive for a predetermined period, and cancels the sleep of the thread through a hardware interrupt at a time of packet arrival, and

an idle state recovery control unit that periodically wakes up the thread at a time of sleep or wakes up the thread immediately before the packet arrival in accordance with a packet arrival timing.

5 . The non-transitory computer-readable storage medium according to claim 1 , wherein the periodically waking up the thread includes selecting either periodic wakeup control for periodically waking up the thread during sleep or pre-wakeup control for waking up the thread immediately before the packet arrival in accordance with the packet arrival timing.

6 . A server delay control method of a server delay controller that is arranged in a kernel space of an OS, implemented by a computer when the computer executes instructions, and starts a thread that monitors packet arrival using a polling model, the server delay controller executing:

monitoring a poll list that registers net device information indicating which device a hardware interrupt from an interface unit comes from;

referring to a packet held in a ring buffer when a packet arrives and executing harvesting to delete an entry of a corresponding queue from the ring buffer;

putting the thread to sleep in a case in which a packet does not arrive for a predetermined period, and canceling the sleep of the thread with a hardware interrupt at a time of packet arrival, and

periodically waking up the thread during sleep or waking up the thread immediately before the packet arrival in accordance with a packet arrival timing.

7 . A server delay control method of a server delay controller that is arranged in a user space, implemented by a computer when the computer executes instructions, and starts a thread that monitors packet arrival using a polling model,

the server delay controller executing:

monitoring packet arrival from an interface unit;

referring to a packet held in a ring buffer when a packet arrives and executing harvesting to delete an entry of a corresponding queue from the ring buffer;

putting the thread to sleep in a case in which a packet does not arrive for a predetermined period, and canceling the sleep of the thread through a hardware interrupt at a time of packet arrival; and

periodically waking up the thread at a time of sleep or waking up the thread immediately before the packet arrival in accordance with a packet arrival timing.

8 . A device including the computer and the non-transitory computer-readable storage medium storing the instructions according to claim 1 .

Assignments (2)
CHANGE OF NAME Recorded Aug 14, 2025
From: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
To: NTT, INC.
Reel/Frame 072462/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2024
From: FUJIMOTO, KEI; NATORI, KO
To: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Reel/Frame 068956/0658 →
Continuity (1)
Related Publication 20250233808A1 · Jul 17, 2025
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