IP Library Granted Patent US 12,699,648
Granted Patent B1
US 12,699,648 · App. 18/883,611 · Granted Aug 4, 2026

Storage system with subdivisions

Inventors: Andrey V. Kuzmin (Moscow, RU); James G. Wayda (Laguna, CA)
Assignee: Radian Memory Systems LLC
G06F12/0246G06F3/0611G06F3/0638G06F3/0679G06F3/0688G06F8/654G06F11/1068G06F11/1072G06F12/10G06F16/1847G06F2015/766G06F2212/2022G06F2212/7207G06F2212/7208
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Quick Facts
Patent No.
US 12,699,648
App. No.
18/883,611
Filed
Sep 12, 2024
Granted
Aug 4, 2026
Kind
B1
Art Unit
2138
USPC
711/103
Abstract

This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.

Claims (70)

1 . A solid state storage drive (SSD) comprising:

a host interface configured to communicate with a host storage manager using commands from a Non-Volatile Memory Express (NVMe) standard;

one or more flash memory dies comprising physical planes, each plane having erase units, each erase unit contained within a single plane, and each erase unit having pages; wherein:

the flash memory is logically organized into subdivisions with non-overlapping ranges of logical block addresses, and

each subdivision is mapped to a set of erase units on at least two different planes;

logic coupled to the host interface and to the flash memory, wherein the logic comprises at least one of hardware logic and software logic and the logic operates to:

in response to an NVMe write command from the host storage manager directed to a specific subdivision, write data corresponding to a sequential range of logical block addresses into an addressed page of each of the erase units on different planes in the specific subdivision using a common physical page address for the addressed page of each of the erase units, wherein operations for the writing of the data execute concurrently in each of the erase units on the different planes to preserve sequential ordering of the logical block addresses while enabling parallel writing of the subdivision;

convert at least one logical block address of the sequential range of logical block addresses into the common physical page address; and

in response to an NVMe maintenance command from the host storage manager directed to the specific subdivision, erase all of the erase units in the specific subdivision, so that the entire range of logical block addresses for the specific subdivision can be rewritten.

2 . The SSD of claim 1 , wherein:

a minimum amount of host accessible storage capacity in the specific subdivision that can be erased by the SSD is equal to a capacity of the specific subdivision, and

the logic further operates to:

in further response to the NVMe write command, update metadata that indicates an extent to which the erase units mapped to the specific subdivision are not yet written following an erase; and

in further response to the NVMe maintenance command, update the metadata to set the extent equal to the capacity of the specific subdivision.

3 . The SSD of claim 1 , wherein the logic further operates to:

during the erasure of the erase units mapped to the specific subdivision, detect a failure condition of a specific one of the erase units, and

in response to detection of the failure condition, map the specific subdivision to a new erase unit which is on the same plane as the specific erase unit with the detected failure condition.

4 . The SSD of claim 1 , wherein the logic further operates to:

store metadata relating to the specific subdivision; and

make available, to the host storage manager, information that depends on the stored metadata, wherein the information represents a state of the specific subdivision and/or a need for maintenance for the specific subdivision.

5 . The SSD of claim 1 , wherein the SSD operates to make information available to the host storage manager, and the information represents a logical block address for the specific subdivision.

6 . The SSD of claim 1 , wherein the logic further operates to make information available to the host storage manager, and the information indicates a host accessible capacity of the specific subdivision and a logical block address associated with the specific subdivision.

7 . The SSD of claim 1 , wherein the logic further operates to make information available to the host storage manager, and the information indicates:

a host accessible capacity of the specific subdivision;

a logical block address associated with the specific subdivision;

a state of the specific subdivision; and

an extent to which the erase units mapped to the specific subdivision are not yet written following an erase.

8 . The SSD of claim 1 , wherein the logic further operates to receive an NVMe query command from the host storage manager, and responsively transmits to the host storage manager one of:

a host accessible capacity of the specific subdivision;

a logical block address associated with the specific subdivision;

a state of the specific subdivision; and

an extent to which the erase units mapped to the specific subdivision are not yet written following an erase.

9 . The SSD of claim 1 , wherein the at least two different planes are each located on a different die.

10 . The SSD of claim 1 , wherein the host storage manager operates to:

track release status information for data written to the subdivisions of the flash memory;

compare the release status information to a criterion for released space;

identify a subdivision based upon the comparison; and

copy data from the identified subdivision to a different erase unit.

11 . The SSD of claim 1 , wherein the host storage manager operates to:

map single non-overlapping segments of logical block address ranges to the subdivisions of the flash memory;

maintain an address translation table that associates individual writes with a specific address within a specific segment;

track release status information of data written to respective segments;

identify at least one garbage collection candidate segment by comparing the release status information to a criterion;

perform segment cleaning wherein the host storage manager issues one or more NVMe commands to the SSD to copy data from the identified segment to a different segment; and

update the address translation table to indicate new addresses of the data copied.

12 . A solid state storage drive (SSD) comprising:

a host interface configured to communicate with a host storage manager using commands from a Non-Volatile Memory Express (NVMe) standard;

one or more flash memory dies comprising physical planes, each plane having erase units, each erase unit contained within a single plane, and each erase unit having pages; wherein:

the flash memory is logically organized into subdivisions, each subdivision associated with a non-overlapping range of logical block addresses;

each subdivision is mapped to a set of the erase units, wherein at least two erase units of each subdivision are contained on different planes; and

all write data blocks accompanying writes to the subdivision must be stored in logical block address sequential order;

logic coupled to the host interface and to the flash memory, wherein the logic comprises at least one of hardware logic and software logic and the logic operates to:

in response to an NVMe write command from the host storage manager directed to a specific subdivision, write data corresponding to a sequential subrange of logical block addresses into an addressed page of each of the erase units on different planes in the specific subdivision using a common page address for the addressed pages of the erase units, wherein operations for the writing of the data execute concurrently in each of the erase units on the different planes to preserve sequential ordering of the logical block addresses while enabling parallel writing of the subdivision; and

in response to an NVMe maintenance command from the host storage manager directed to the specific subdivision, erase all of the erase units in the specific subdivision, so that the entire range of logical block addresses for the specific subdivision can be subsequently rewritten.

13 . The SSD of claim 12 , wherein the logic further operates to convert at least one logical block address of the sequential subrange of logical block addresses into the common physical page address.

14 . The SSD of claim 12 , wherein the logic further operates to update metadata that indicates an extent to which the erase units mapped to the specific subdivision are not yet written following an erase, in response to receiving the NVMe write command.

15 . The SSD of claim 12 , wherein the logic further operates to:

during the erasure of the erase units mapped to the specific subdivision, detect a failure condition of a specific one of the erase units, and

in response to detection of the failure condition, map the specific subdivision to a new erase unit which is on the same plane as the specific erase unit with the detected failure condition.

16 . The SSD of claim 12 , wherein the logic further operates to:

store metadata relating to the specific subdivision; and

make information available to the host storage manager wherein the information depends on the stored metadata relating to the specific subdivision.

17 . The SSD of claim 16 , wherein the information represents a need for maintenance for the specific subdivision.

18 . The SSD of claim 12 , wherein the logic further operates to make information available to the host storage manager, and the information indicates a host accessible capacity of the specific subdivision and a logical block address associated with the specific subdivision.

19 . The SSD of claim 12 , wherein the logic further operates to make information available to the host storage manager, wherein the information indicates:

a host accessible capacity of the specific subdivision;

a logical block address associated with the specific subdivision;

a state of the specific subdivision; and

an extent to which the erase units mapped to the specific subdivision are not yet written following an erase.

20 . The SSD of claim 12 , wherein the at least two different planes are each located on a different die.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2024
From: RADIAN MEMORY SYSTEMS, INC.
To: RADIAN MEMORY SYSTEMS LLC
Reel/Frame 068968/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2024
From: WAYDA, JAMES G.; KUZMIN, AUDREY V.
To: RADIAN MEMORY SYSTEMS, LLC
Reel/Frame 068961/0803 →
CHANGE OF NAME Recorded Oct 21, 2024
From: RADIAN MEMORY SYSTEMS, LLC
To: RADIAN MEMORY SYSTEMS, INC.
Reel/Frame 069196/0428 →
Continuity (12)
Continuation 18516384 · Nov 21, 2023
Continuation 18124514 · Mar 21, 2023
Continuation 17877881 · Jul 29, 2022
Continuation 17563481 · Dec 28, 2021
Continuation 16751925 · Jan 24, 2020
Continuation 16570922 · Sep 13, 2019
Continuation 15621888 · Jun 13, 2017
Continuation 15346641 · Nov 8, 2016
Continuation 14951708 · Nov 25, 2015
Continuation 14047193 · Oct 7, 2013
Continuation In Part 13767723 · Feb 14, 2013
Provisional Application 61757464 · Jan 28, 2013
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