IP Library Patent Application 18894558
Patent Application
App. No. 18/894,558

SEMICONDUCTOR DIE SHIELDING STRUCTURE

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Quick Facts
Patent No.
US None
App. No.
18/894,558
Abstract

According to some embodiments, a device is provided that includes a pre-package and an interconnect package. The pre-package has a semiconductor die having a first contact pad, a molding layer over the semiconductor die, and a first contact comprising a first base portion embedded in the molding layer and contacting the first contact pad, and a first fan out portion over a portion of the molding layer and extending from the first base portion. The interconnect package has a first interconnect structure embedded in a dielectric material and contacting the first contact, wherein the pre-package is embedded in the dielectric material.

Claims (94)

1 . A device, comprising:

a pre-package comprising:

a semiconductor die comprising a first contact pad;

a molding layer over the semiconductor die; and

a first contact comprising:

a first base portion embedded in the molding layer and contacting the first contact pad; and

a first fan out portion over a portion of the molding layer and extending from the first base portion; and

an interconnect package, comprising:

a first interconnect structure embedded in a dielectric material and contacting the first contact, wherein:

the pre-package is embedded in the dielectric material.

2 . The device of claim 1 , wherein:

the first contact pad contacts a first source/drain region of a semiconductor device in the semiconductor die.

3 . The device of claim 2 , wherein:

the pre-package comprises:

a second contact pad in the semiconductor die contacting a second source/drain region of the semiconductor device; and

a second contact comprising:

a second base portion embedded in the molding layer and contacting the second contact pad; and

a second fan out portion over a second portion of the molding layer and extending from the second base portion; and

the interconnect package comprises:

a second interconnect structure embedded in the dielectric material and contacting the second contact.

4 . The device of claim 1 , wherein:

the interconnect package comprises:

a second interconnect structure embedded in the dielectric material and contacting a substrate of the semiconductor die.

5 . The device of claim 4 , wherein:

the interconnect package comprises:

a back side contact pad connected to the second interconnect structure.

6 . The device of claim 1 , wherein:

the interconnect package comprises:

a front side contact pad connected to the first interconnect structure on a first surface of the interconnect package; and

a back side contact pad connected to the first interconnect structure on a second surface of the interconnect package opposite the first surface.

7 . The device of claim 1 , wherein:

the first fan out portion extends from the first base portion in a direction toward an edge of the semiconductor die.

8 . The device of claim 1 , wherein:

the first fan out portion extends from the first base portion in a first direction toward an edge of the semiconductor die and in a second direction away from the edge of the semiconductor die.

9 . A method, comprising:

forming a molding layer over a semiconductor die;

forming a first contact opening in the molding layer to expose a first contact pad of the semiconductor die;

forming a conductive layer over the molding layer and in the first contact opening;

patterning the conductive layer to form a first contact comprising:

a first base portion extending through the molding layer and contacting the first contact pad; and

a first fan out portion extending from the first base portion over a first portion of the molding layer;

mounting the semiconductor die in a recess of an interconnect package;

forming a dielectric material in the recess; and

forming a first interconnect structure embedded in the dielectric material and contacting the first contact.

10 . The method of claim 9 , comprising:

providing the first contact pad contacting a first source/drain region of a semiconductor device in the semiconductor die.

11 . The method of claim 10 , comprising:

forming a second contact opening in the molding layer to expose a second contact pad of the semiconductor die, wherein:

the second contact pad contacts a second source/drain region of the semiconductor device;

forming the conductive layer comprises forming the conductive layer in the second contact opening; and

patterning the conductive layer comprises patterning the conductive layer to form a second contact in the second contact opening comprising:

a second base portion extending through the molding layer and contacting the second contact pad; and

a second fan out portion extending from the second base portion over a second portion of the molding layer; and

forming a second interconnect structure embedded in the dielectric material and contacting the second contact.

12 . The method of claim 9 , wherein:

mounting the semiconductor die in the recess comprises:

contacting a substrate of the semiconductor die to a second interconnect structure in the interconnect package, wherein:

the interconnect package comprises:

a back side contact pad connected to the second interconnect structure.

13 . The method of claim 9 , comprising:

providing the interconnect package comprising:

a front side contact pad connected to the first interconnect structure on a first surface of the interconnect package; and

a back side contact pad connected to the first interconnect structure on a second surface of the interconnect package opposite the first surface.

14 . The method of claim 9 , wherein:

patterning the conductive layer to form the first contact comprises:

forming the first fan out portion to extend from the first base portion in a direction toward an edge of the semiconductor die.

15 . The method of claim 9 , wherein:

patterning the conductive layer to form the first contact comprises:

forming the first fan out portion to extend from the first base portion in a first direction toward an edge of the semiconductor die and in a second direction away from the edge of the semiconductor die.

16 . A device, comprising:

a semiconductor die comprising:

a power semiconductor device, comprising:

a first source/drain region; and

a second source/drain region;

a first contact pad connected to the first source/drain region; and

a second contact pad connected to the second source/drain region;

a molding layer over the semiconductor die;

a first contact comprising:

a first base portion embedded in the molding layer and contacting the first contact pad; and

a first fan out portion over a first portion of the molding layer and extending from the first base portion;

a second contact comprising:

a second base portion embedded in the molding layer and contacting the second contact pad; and

a second fan out portion over a second portion of the molding layer and extending from the second base portion;

a first interconnect structure embedded in a dielectric material and contacting the first contact; and

a second interconnect structure embedded in the dielectric material and contacting the second contact.

17 . The device of claim 16 , comprising:

a third interconnect structure embedded in the dielectric material and contacting a substrate of the semiconductor die.

18 . The device of claim 17 , comprising:

a back side contact pad connected to the third interconnect structure.

19 . The device of claim 16 , comprising:

a front side contact pad connected to the first interconnect structure on a first surface of the device; and

a back side contact pad connected to the first interconnect structure on a second surface of the device opposite the first surface.

20 . The device of claim 16 , wherein:

the first fan out portion extends from the first base portion in a first direction toward an edge of the semiconductor die and in a second direction away from the edge of the semiconductor die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2025
From: INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AUSTRIA AG
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