SECURE SERIAL BUS WITH AUTOMOTIVE APPLICATIONS
Secure serial bus communication methods and devices suitable for automotive applications. An illustrative integrated circuit includes: a scrambler configured to process data packets into masked data packets using a configuration or an initial state derived by proprietary processing of a seed value stored in the clear or received via a bus; and a digital-to-analog converter configured to send the masked data packets via the bus.
1 . An integrated circuit comprising:
a scrambler configured to process data packets into masked data packets using a configuration or an initial state derived by proprietary processing of a seed value stored in the clear or received via a bus; and
a digital-to-analog converter configured to send the masked data packets via the bus.
2 . The integrated circuit of claim 1 , wherein the scrambler processes data packets without being reset between transmissions.
3 . The integrated circuit of claim 1 , further comprising:
a descrambler configured to receive and unmask command messages from a bus controller device using the configuration or the initial state derived by proprietary processing of the seed value.
4 . The integrated circuit of claim 1 , further comprising:
an integrated circuit component configured to derive the configuration or the initial state using built-in self-test (BIST) circuitry.
5 . The integrated circuit of claim 4 , wherein the BIST circuitry is configured to provide the configuration or initial state as a test result.
6 . The integrated circuit of claim 1 , further comprising:
an integrated circuit component configured to derive the configuration or the initial state using a digital filter.
7 . The integrated circuit of claim 6 , wherein the digital filter is configured to produce truncated bits while operating on the seed value, and wherein the configuration or the initial state is derived using the truncated bits.
8 . A bus communication method comprising:
using a scrambler to process data packets into masked data packets using a configuration or an initial state derived by proprietary processing of a seed value stored in the clear or received via a bus; and
sending the masked data packets via the bus.
9 . The bus communication method of claim 8 , wherein the scrambler processes data packets without being reset between transmissions.
10 . The bus communication method of claim 8 , further comprising:
using a descrambler unmask command messages received via the bus using the configuration or the initial state derived by proprietary processing of the seed value.
11 . The bus communication method of claim 8 , further comprising:
using built-in self-test (BIST) circuitry to derive the configuration or the initial state.
12 . The bus communication method of claim 11 , wherein the BIST circuitry is configured to provide the configuration or initial state as a test result.
13 . The bus communication method of claim 8 , further comprising:
using a digital filter to derive the configuration or the initial state.
14 . The bus communication method of claim 13 , wherein the digital filter is configured to produce truncated bits while operating on the seed value, and wherein the configuration or the initial state is derived using the truncated bits.
15 . A bus controller comprising:
an integrated circuit component configured to perform proprietary processing of multiple seed values, each of the multiple seed values being associated with a respective slave device, the proprietary processing producing a scrambler configuration or an initial scrambler state for the respective slave device; and
a descrambler configured to use the scrambler configuration or the initial scrambler state for each respective slave device to unmask masked data packets received from that respective slave device.
16 . The bus controller of claim 15 , further comprising:
a scrambler configured to use the scrambler configuration or the initial scrambler state for each respective slave device to process message packets into masked message packets for that respective slave device; and
a digital-to-analog converter configured to send the masked message packets via the bus.
17 . The bus controller of claim 15 , further comprising:
a memory configured to preserve a current scrambler state for each respective slave device between reception of masked data packets from that respective slave device.
18 . The bus controller of claim 15 , further comprising:
an integrated circuit component configured to derive the scrambler configuration or the initial scrambler state for each respective slave device using built-in self-test (BIST) circuitry.
19 . The bus controller of claim 18 , wherein the BIST circuitry is configured to derive the scrambler configuration or the initial scrambler state for each respective slave device as a respective test result.
20 . The bus controller of claim 15 , further comprising:
an integrated circuit component configured to derive the scrambler configuration or the initial scrambler state for each respective slave device using a digital filter.