IP Library Patent Application 18937318
Patent Application
App. No. 18/937,318

POLISHING COMPOSITION FOR A SEMICONDUCTOR PROCESS AND MANUFACTURING METHOD OF SUBSTRATE USING THE SAME

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Quick Facts
Patent No.
US None
App. No.
18/937,318
Abstract

A polishing composition for a semiconductor process according to one embodiment of the present disclosure includes a polishing particle and a corrosion inhibitor. The corrosion inhibitor includes a first corrosion inhibitor, which is an amino azole-based compound and a second corrosion inhibitor, which is a diazole-based compound. The polishing composition for a semiconductor process has a pH of 2 to 5. A static etch rate for a tungsten film of the polishing composition for a semiconductor process is 6 Å/min or less. When polishing a substrate comprising a tungsten film and the silicon oxide film, such a polishing composition may provide a defect-reduced polished surface while exhibiting excellent polishing rate for a silicon oxide film.

Claims (20)

1 . A polishing composition for a semiconductor process, comprising

a polishing particle; and a corrosion inhibitor,

wherein the corrosion inhibitor comprises a first corrosion inhibitor, which is an amino azole-based compound; and a second corrosion inhibitor, which is a diazole-based compound,

wherein the polishing composition for a semiconductor process has a pH of 2 to 5, and

a static etch rate for a tungsten film of the polishing composition for a semiconductor process is 6/min or less.

2 . The polishing composition for a semiconductor process of claim 1 ,

I corr , which is a corrosion current density for a tungsten film of the polishing composition for a semiconductor process is 60 μA/cm 2 or less.

3 . The polishing composition for a semiconductor process of claim 1 ,

E corr , which is a corrosion potential for a tungsten film of the polishing composition for a semiconductor process is −30 mV or more.

4 . The polishing composition for a semiconductor process of claim 1 ,

comprising the corrosion inhibitor of 0.07 wt % to 3 wt %.

5 . The polishing composition for a semiconductor process of claim 1 ,

wherein a ratio of a content (by weight) of the second corrosion inhibitor to a content (by weight) of the first corrosion inhibitor is 0.6 to 2.0.

6 . The polishing composition for a semiconductor process of claim 1 ,

wherein the corrosion inhibitor inhibits corrosion of a tungsten film.

7 . The polishing composition for a semiconductor process of claim 1 ,

further comprising a fluorine-based surfactant of 10 ppm (by weight) to 500 ppm (by weight).

8 . The polishing composition for a semiconductor process of claim 1 ,

a polishing selectivity ratio of a silicon oxide film to a tungsten film of the polishing composition for a semiconductor process is 5 or more.

9 . A method of manufacturing a substrate, comprising polishing a substrate by applying the polishing composition for a semiconductor process of claim 1 as a slurry.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2026
From: SK ENPULSE CO., LTD.
To: YCCHEM CO., LTD.
Reel/Frame 074058/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2024
From: HAN, DEOK SU; CHO, JONG YOUNG; KIM, WOO JOO; KANG, HYUN GOO; LEE, DONG KYUN
To: SK ENPULSE CO., LTD.; SK HYNIX INC.
Reel/Frame 069141/0795 →