MONOLITHIC SEMICONDUCTOR DEVICE ASSEMBLIES
In a general aspect, a method includes forming, in a semiconductor device layer disposed on a semiconductor substrate, an opening between a first semiconductor device stack included in the semiconductor device layer and a second semiconductor device stack included in the semiconductor device layer. The method also includes forming a trench in the semiconductor substrate between the first semiconductor device stack and the second semiconductor device stack, the trench corresponding with the opening. The method further includes filling the trench with a first dielectric material, thinning the semiconductor substrate to expose the first dielectric material and separate the semiconductor substrate into a first substrate portion and a second substrate portion, and forming a layer of a second dielectric material on the first substrate portion, the second substrate portion and the exposed first dielectric material.
1 . A method comprising:
forming, in a semiconductor device layer disposed on a semiconductor substrate, an opening between a first semiconductor device stack included in the semiconductor device layer and a second semiconductor device stack included in the semiconductor device layer;
forming a trench in the semiconductor substrate between the first semiconductor device stack and the second semiconductor device stack, the trench corresponding with the opening;
filling the trench with a first dielectric material;
thinning the semiconductor substrate to expose the first dielectric material and separate the semiconductor substrate into a first substrate portion and a second substrate portion; and
forming a layer of a second dielectric material on the first substrate portion, the second substrate portion and the exposed first dielectric material.
2 . The method of claim 1 , further comprising, prior to forming the trench, forming at least one of signal traces or solder bumps on the first semiconductor device stack and the second semiconductor device stack.
3 . The method of claim 1 , wherein:
the first dielectric material is a molding compound; and
the second dielectric material is a thermally conductive dielectric material different than the molding compound.
4 . The method of claim 1 , wherein the first dielectric material and the second dielectric material are a molding compound.
5 . The method of claim 1 , wherein:
the second dielectric material is a thermally conductive dielectric material, the method further comprising disposing a thermally conductive material on the thermally conductive dielectric material.
6 . The method of claim 5 , wherein the thermally conductive material includes at least one of:
a solder;
a heat slug;
a heat sink; or
a cooling jacket.
7 . The method of claim 1 , wherein:
the second dielectric material includes a ceramic material; and
forming the layer of the second dielectric material includes one of:
sputtering the ceramic material; or
aerosol depositing the ceramic material.
8 . The method of claim 1 , wherein:
filling the trench with the first dielectric material includes performing a compression molding operation to:
fill the trench with a molding compound;
fill the opening between the first semiconductor device stack with the molding compound; and
overmold respective upper surfaces of the first semiconductor device stack and the second semiconductor device stack with the molding compound.
9 . The method of claim 1 , wherein:
the first semiconductor device stack includes a first gallium nitride (GaN) transistor;
the second semiconductor device stack includes a second GaN transistor; and
the semiconductor substrate is a silicon substrate.
10 . The method of claim 1 , wherein the semiconductor device layer is a gallium nitride semiconductor device layer.
11 . The method of claim 1 , wherein the opening and the trench are formed around the first semiconductor device stack and the second semiconductor device stack.
12 . The method of claim 1 , wherein filling the trench with the first dielectric material includes one of:
depositing an oxide material;
depositing a nitride material; or
depositing an organic material.
13 . A method comprising:
forming, in a semiconductor device layer disposed on a semiconductor substrate, an opening between a first semiconductor device stack included in the semiconductor device layer and a second semiconductor device stack included in the semiconductor device layer;
forming a trench in the semiconductor substrate between the first semiconductor device stack and the second semiconductor device stack, the trench corresponding with the opening;
performing a molding operation to:
fill the trench with a molding compound;
fill the opening between the first semiconductor device stack with the molding compound; and
overmold respective upper surfaces of the first semiconductor device stack and the second semiconductor device stack with the molding compound;
thinning the semiconductor substrate to expose the molding compound in the trench and separate the semiconductor substrate into a first substrate portion and a second substrate portion; and
forming a layer of a thermally conductive dielectric material on the first substrate portion, the second substrate portion and the exposed molding compound.
14 . The method of claim 13 , further comprising, prior to forming the trench, forming at least one of signal traces or solder bumps on the first semiconductor device stack and the second semiconductor device stack.
15 . The method of claim 13 , further comprising disposing a thermally conductive material on the thermally conductive dielectric material.
16 . The method of claim 15 , wherein the thermally conductive material includes at least one of:
a solder;
a heat slug;
a heat sink; or
a cooling jacket.
17 . The method of claim 13 , wherein:
the thermally conductive dielectric material includes a ceramic material; and
forming the layer of the thermally conductive dielectric material includes one of:
sputtering the ceramic material; or
aerosol depositing the ceramic material.
18 . The method of claim 13 , wherein:
the first semiconductor device stack includes a first gallium nitride (GaN) transistor;
the second semiconductor device stack includes a second GaN transistor; and
the semiconductor substrate is a silicon substrate.
19 . The method of claim 13 , wherein the semiconductor device layer is a gallium nitride semiconductor device layer.
20 . The method of claim 13 , wherein the opening and the trench are formed around the first semiconductor device stack and the second semiconductor device stack.