IP Library › Patent Application 19013290
Patent Application
App. No. 19/013,290

Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

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Quick Facts
Patent No.
US None
App. No.
19/013,290
Abstract

Some embodiments include an assembly having a stack of alternating dielectric levels and conductive levels. Channel material pillars extend through the stack. Some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. Memory cells are along the channel material pillars. An insulative level is over the stack. A select gate configuration is over the insulative level. The select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. The first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. The first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another. Some embodiments include methods of forming assemblies.

Claims (15)

1 . An assembly, comprising:

a stack comprising alternating dielectric levels and conductive levels;

a channel material pillar extending through the stack;

memory cells along the channel material pillar;

an insulative level over the stack; and

a select gate configuration over the insulative level and comprising a first conductive gate structure and a second conductive gate structure being laterally spaced from one another by an intervening insulative region.

2 . The assembly of claim 1 further comprising a conductive interconnect extending through an uppermost surface of the channel material pillar.

3 . The assembly of claim 2 wherein the conductive interconnect extends only partially into the channel material pillar.

4 . The assembly of claim 1 wherein the first and second conductive gate structures have vertically-spaced conductive regions separated from one another by dielectric regions.

5 . The assembly of claim 4 further comprising vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another.

6 . The assembly of claim 5 wherein the vertically-extending conductive structures extend through the intervening insulative region.

7 . The assembly of claim 1 further comprising an insulative layer extending through the intervening insulative region.

8 . The assembly of claim 1 wherein the first conductive gate structure comprises a different structural configuration relative to the second conductive gate structure.

9 . The assembly of claim 7 further comprising an insulative liner against the insulative level.

10 . The assembly of claim 7 further comprising an insulative liner over the insulative level and against an uppermost surface of the channel material pillar.