IP Library Patent Application 19019016
Patent Application
App. No. 19/019,016

SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO INTERCONNECT STRUCTURES

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Quick Facts
Patent No.
US None
App. No.
19/019,016
Abstract

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

Claims (42)

1 . A semiconductor device, comprising:

a first substrate comprising one or more side surfaces;

a plurality of recesses formed in the one or more side surfaces of the first substrate;

a second substrate comprising one or more side surfaces;

one or more extensions comprised on the one or more side surfaces of the second substrate;

a third substrate comprising one or more side surfaces;

a first conductive layer on the one or more side surfaces of the first substrate;

a second conductive layer on the one or more side surfaces of the second substrate; and

a third conductive layer on the one or more side surfaces of the third substrate;

wherein the second substrate is electrically and mechanically coupled with the first substrate at the one or more extensions.

2 . The device of claim 1 , further comprising an interconnect, wherein the interconnect includes a conductive material formed over a junction between the first conductive layer of the first substrate and the second conductive layer of the second substrate.

3 . The device of claim 1 , wherein the first conductive layer of the first substrate and the second conductive layer of the second substrate include a conductive epoxy or anisotropic conductive film.

4 . The device of claim 1 , wherein an extension of the one or more extensions has an angled profile and a recess of the plurality of recesses has an angled profile.

5 . The device of claim 1 , wherein the one or more side surfaces of the first substrate and the one or more side surfaces of the second substrate are angled.

6 . The device of claim 1 , wherein the first conductive layer and the second conductive layer comprise one of Al, Sn, Ni, Au, Ag, Pb, Bi, Cu, solder, or any combination thereof.

7 . A semiconductor device, comprising:

a first substrate comprising one or more side surfaces;

a plurality of recesses formed in the one or more side surfaces of the first substrate;

a second substrate comprising one or more side surfaces;

one or more extensions comprised on the one or more side surfaces of the second substrate;

a first conductive layer on the one or more side surfaces of the first substrate; and

a second conductive layer on the one or more side surfaces of the second substrate;

wherein the second substrate is electrically and mechanically coupled with the first substrate at the one or more extensions.

8 . The device of claim 7 , further comprising an interconnect comprising a conductive material formed over a junction between the first conductive layer of the first substrate and the second conductive layer of the second substrate.

9 . The device of claim 7 , wherein the first conductive layer of the first substrate and the second conductive layer of the second substrate includes a conductive epoxy or anisotropic conductive film.

10 . The device of claim 7 , wherein the first substrate has more than four side surfaces.

11 . The device of claim 7 , wherein the one or more side surfaces of the first substrate and of the second substrate are angled.

12 . The device of claim 10 , further a third substrate.

13 . The device of claim 10 , wherein the first conductive layer and the second conductive layer comprise one of Al, Sn, Ni, Au, Ag, Pb, Bi, Cu, solder, and any combination thereof.

14 . The device of claim 10 , wherein each side surface of the one or more side surfaces of the first substrate comprise two or more recesses.

15 . A semiconductor device, comprising:

a first substrate comprising one or more side surfaces;

a plurality of recesses formed in the one or more side surfaces of the first substrate;

a second substrate comprising one or more side surfaces;

one or more extensions comprised on the one or more side surfaces of the second substrate; and

a conductive layer coupled over the one or more extensions,

wherein the first substrate is electrically coupled to second substrate through the conductive layer.

16 . The device of claim 15 , further comprising an interconnect coupled to the one or more extensions and to the first substrate.

17 . The device of claim 15 , wherein each side surface of the one or more side surfaces of the first substrate comprise two or more recesses.

18 . The device of claim 15 , further comprising a second conductive layer coupled within the plurality of recesses.

19 . The device of claim 17 , wherein each side surface of the one or more side surfaces of the second substrate comprise two or more extensions.

20 . The device of claim 18 , wherein the conductive layer and the second conductive layer include one of a conductive epoxy or anisotropic conductive film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2025
From: CARNEY, FRANCIS J.; HALL, JEFFERSON W.; SEDDON, MICHAEL J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 069844/0936 →