VECTOR PROCESSOR STORAGE
A method comprising: receiving, at a vector processor, a request to store data; performing, by the vector processor, one or more transforms on the data; and directly instructing, by the vector processor, one or more storage device to store the data; wherein performing one or more transforms on the data comprises: erasure encoding the data to generate n data fragments configured such that any k of the data fragments are usable to regenerate the data, where k is less than n; and wherein directly instructing one or more storage device to store the data comprises: directly instructing the one or more storage devices to store the plurality of data fragments.
1 . A method comprising:
receiving, at a vector processor, a request to store data;
performing, by the vector processor, one or more transforms on the data, wherein performing one or more transforms on the data comprises erasure encoding the data to generate n data fragments configured such that any k of the data fragments are usable to regenerate the data, where k is less than n;
instructing, by the vector processor, one or more storage devices to store the data; and
receiving, by the vector processor, an acknowledgment from the one or more storage devices that m of the data fragments have been stored, in which k≤m<n.
2 . The method of claim 1 , wherein performing one or more transforms on the data comprises performing one or more invertible transforms on the data.
3 . The method of claim 1 , wherein:
performing one or more transforms on the data further comprises calculating a cryptographic hash for the data; and
instructing one or more storage device to store the data comprises instructing the one or more storage devices to store the cryptographic hash for the data.
4 . The method of claim 1 , wherein performing one or more transforms on the data comprises logging a storage event associated with the request to store data.
5 . The method of claim 1 , wherein performing one or more transforms on the data comprises one or more of encrypting or compressing the data.
6 . A system comprising:
a vector processor; and
a memory, wherein the memory comprises instructions which, when executed by the vector processor, configure the vector processor to perform the method of claim 1 .
7 . One or more non-transitory computer readable media comprising instructions which, when executed by a vector processor, cause the vector processor to perform the method of claim 1 .
8 . A method comprising:
storing a plurality of data fragments at a memory;
periodically attempting, by a vector processor, to decode the plurality of data fragments stored at the memory, wherein when an insufficient number of data fragments have been written to the memory, the vector processor failing to correctly decode the data fragments, and wherein when a sufficient number of data fragments have been written to the memory, the vector processor correctly decoding the plurality of data fragments to form decoded data; and
utilizing a checksum included in the decoded data to determine whether the decoded data was decoded correctly.
9 . The method of claim 8 , wherein the vector processor utilizes a Berlekamp-Welch algorithm to decode the plurality of data fragments.
10 . The method of claim 8 , further comprising storing the decoded data at a first memory address specified in a data retrieval request.
11 . The method of claim 8 , wherein the vector processor attempts to periodically decode the plurality of data fragments stored at the memory in response to a request to retrieve data stored at the memory.
12 . The method of claim 8 , wherein the vector processor comprises one or more of a graphics processing unit (GPU) or a field programmable gate array (FPGA).
13 . A system comprising:
a vector processor; and
a memory, wherein the memory comprises instructions which, when executed by the vector processor, configure the vector processor to perform the method of claim 8 .
14 . One or more non-transitory computer readable media comprising instructions which, when executed by a vector processor, cause the vector processor to perform the method of claim 8 .
15 . A method, comprising:
receiving, by a vector processor, a request to store data;
performing, by the vector processor, one or more transforms on the data; and
storing, by the vector processor, respective parts of the transformed data on a first and a second storage device, wherein the vector processor simultaneously instructs the first and second storage devices to store the respective parts of the transformed data.
16 . The method of claim 15 , wherein the one or more transforms comprise one or more of encrypting the data, encoding the data, compressing the data, deduplicating the data, or logging the data.
17 . The method of claim 15 , wherein the first and second storage devices each include one or more of a hard disk drive, a solid-state drive, a network device or a storage controller that is communicatively coupled to a further storage device.
18 . The method of claim 15 , further comprising, after storing the respective parts of the transformed data on the first and second storage devices, acknowledging, by the vector processor, that the data has been stored.
19 . A system comprising:
a vector processor; and
a memory, wherein the memory comprises instructions which, when executed by the vector processor, configure the vector processor to perform the method of claim 15 .
20 . One or more non-transitory computer readable media comprising instructions which, when executed by a vector processor, cause the vector processor to perform the method of claim 15 .