IP Library Patent Application 19029740
Patent Application
App. No. 19/029,740

DETECTING MICROCRACKS IN A SEMICONDUCTOR DIE

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Quick Facts
Patent No.
US None
App. No.
19/029,740
Abstract

A microcrack detection system detects cracks and/or microcracks within a semiconductor die and/or within a semiconductor package. The microcrack detection system applies an electrical current to the semiconductor die. The electrical current causes a temperature of the semiconductor die to increase. One or more thermal sensors are used to determine a thermal profile of the semiconductor die. The thermal profile is analyzed to determine whether cracks or defects exist within the semiconductor die.

Claims (40)

1 . A method, comprising:

applying an electrical current to a semiconductor die;

thermally scanning an area of the semiconductor die for one or more thermal variations;

generating a heat map based, at least in part, on the one or more thermal variations;

analyzing the heat map to determine whether any of the one or more thermal variations exceeds a thermal variation threshold; and

identifying a microcrack based, at least in part, on a determination that at least one thermal variation exceeds the thermal variation threshold.

2 . The method of claim 1 , wherein applying the electrical current to the semiconductor die comprises:

positioning a plurality of probes on the semiconductor die; and

providing the electrical current to the plurality of probes.

3 . The method of claim 2 , wherein positioning the plurality of probes on the semiconductor die comprises positioning a first probe of the plurality of probes at a first location on the semiconductor die and positioning a second probe of the plurality of probes at a second location on the semiconductor die, the second location being different than the first location.

4 . The method of claim 3 , wherein the first location comprises a corner of the semiconductor die and the second location comprises a center of the semiconductor die.

5 . The method of claim 2 , wherein the electrical current is in a range between ten microamps (μA) and one hundred μA.

6 . The method of claim 1 , wherein the thermal variations are identified based, at least in part, by comparing a temperature reading to a baseline temperature.

7 . The method of claim 1 , wherein thermally scanning the area of the semiconductor die for the one or more thermal variations comprises:

positioning at least one thermal sensor above the semiconductor die;

causing the thermal sensor to scan the area; and

collecting thermal data across the scanning area.

8 . The method of claim 1 , wherein applying the electrical current to the semiconductor die comprises applying the electrical current to a connector associated with the semiconductor die.

9 . The method of claim 1 , wherein the thermal scanning is complete in four seconds or less.

10 . A method, comprising:

positioning a plurality of probes on at least one semiconductor die;

providing an electrical current through the plurality of probes to induce localized heating of the at least one semiconductor die;

removing the plurality of probes from the at least one semiconductor die;

scanning a scanning area of the at least one semiconductor die to collect thermal data associated with the scanning area;

generating a heat map based, at least in part, on the thermal data; and

analyzing the heat map to detect thermal variations that exceed a thermal variation threshold value to detect a microcrack.

11 . The method of claim 10 , wherein generating the heat map comprises generating a visual representation of the collected thermal data with a precision of five microns.

12 . The method of claim 11 , wherein the precision of five microns facilitates detection of internal cracks as small as ten microns.

13 . The method of claim 10 , wherein the electrical current is in a range between ten microamps (μA) and one hundred μA.

14 . The method of claim 10 , wherein the thermal variations are identified based, at least in part, by comparing a temperature reading to a baseline temperature.

15 . The method of claim 10 , wherein positioning the plurality of probes on the at least one semiconductor die comprises positioning a first probe of the plurality of probes proximate an edge of the at least one semiconductor die and positioning a second probe of the plurality of probes proximate a center of the at least one semiconductor die.

16 . A system, comprising:

means for inducing localized heating of a semiconductor die;

means for measuring a surface temperature the semiconductor die;

means for generating a heat map based, at least in part, on the surface temperature of the semiconductor die; and

means for analyzing the heat map to detect a crack within the at least one memory die.

17 . The system of claim 16 , wherein the means for inducing localized heating of the semiconductor die comprise a plurality of conductive probes.

18 . The system of claim 16 , wherein the means for measuring the surface temperature of the semiconductor die comprise at least one thermal sensor.

19 . The system of claim 16 , wherein the means for analyzing the heat map to detect a crack within the semiconductor die detects cracks as small as ten microns.

20 . The system of claim 16 , wherein the crack is detected based, at least in part, on a comparison between a temperature reading of an area of the semiconductor die to a baseline temperature.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2025
From: ANG, CHING YOONG; SYED AMIR, SYED MOHD IKMAL; NORKHALID, AMZAR
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 070286/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2025
From: ANG, CHING YOONG; SYED AMIR, SYED MOHD IKMAL; NORKHALID, AMZAR
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069993/0811 →