Granted Patent B2

US 12,514,136 · App. 19/045,111 · Granted Dec 30, 2025

Inventors: David Pappas (Boulder, CO); Mark Field (Campbell, CA); Eyob A. Sete (Walnut Creek, CA); Joshua Yousouf Mutus (Kelowna, CA); Xiqiao Wang (Fremont, CA)

Assignee: Rigetti & Co, LLC

H10N60/0912H10N60/12H10N69/00

Abstract

Claims (25)

1 . A method comprising:

obtaining a substrate comprising a tunnel junction; and

performing an alternating-bias assisted annealing process on the tunnel junction, comprising applying a sequence of annealing pulses with alternating polarities and measurement pulses on the tunnel junction,

wherein the alternating-bias assisted annealing process changes one or more properties of the tunnel junction, the one or more properties including the superconducting critical current of the tunnel junction at a cryogenic temperature.

2 . The method of claim 1 , wherein the tunnel junction comprises a pair of electrodes and a barrier layer between the pair of electrodes, and performing the alternating-bias assisted annealing process comprises applying the sequence of annealing pulses and measurement pulses across the pair of electrodes.

3 . The method of claim 2 , wherein the tunnel junction comprises a metal and a metal oxide, the metal is made of aluminum, and the metal oxide comprises amorphous aluminum oxide.

4 . The method of claim 2 , wherein performing the alternating-bias assisted annealing process comprises:

performing the alternating-bias assisted annealing process at room temperature.

5 . The method of claim 1 , wherein:

each annealing pulse in the sequence has a first voltage amplitude; and

each measurement pulse in the sequence has a second voltage amplitude that is less than the first voltage amplitude.

6 . The method of claim 5 , wherein the alternating-bias assisted annealing process is performed at room temperature, and wherein the first voltage amplitude is less than a breakdown voltage of the tunnel junction and preserves functionality of the tunnel junction.

7 . The method of claim 1 , wherein performing the alternating-bias assisted annealing process comprises:

measuring a junction resistance of the tunnel junction to obtain a measured value of the junction resistance;

comparing the measured value of the junction resistance to a target value; and

based on the comparison, terminating the alternating-bias assisted annealing process.

8 . The method of claim 7 , wherein the target value is associated with a room-temperature junction resistance of the tunnel junction, and the target value is calculated based on a target superconducting critical current of the tunnel junction at a cryogenic temperature according to the Ambegaokar-Baratoff formula.

9 . The method of claim 1 , wherein the tunnel junction is a first tunnel junction, the substrate comprises a plurality of tunnel junctions including the first tunnel junction, and the method comprises performing the alternating-bias assisted annealing process on the plurality of tunnel junctions.

10 . The method of claim 9 , wherein the alternating-bias assisted annealing process is applied to the respective tunnel junctions in parallel.

11 . The method of claim 9 , wherein the substrate comprises a plurality of qubit devices, and applying the alternating-bias assisted annealing process comprises tuning transition frequencies of the plurality of qubit devices.

12 . The method of claim 9 , wherein the alternating-bias assisted annealing process increases respective coherence times of the qubit devices.

13 . The method of claim 9 , wherein performing the alternating-bias assisted annealing process on the plurality of tunnel junctions comprises tuning the one or more properties of the plurality of tunnel junctions.

14 . The method of claim 9 , wherein the superconducting critical currents of the plurality of tunnel junctions at a cryogenic temperature are tuned to respective values by the alternating-bias assisted annealing process.

15 . The method of claim 1 , wherein each of the measurement pulses in the sequence is applied between a respective pair of the annealing pulses in the sequence.

16 . The method of claim 1 , wherein the annealing pulses have distinct voltage amplitudes.

Assignments (1)

Continuity (4)

References Cited (97)