MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER

1 . A system comprising:

a cache tag bank;

a snoop filter bank coupled to the cache tag bank;

a controller coupled to the cache tag bank and configurable to:

receive a first read request that includes a first address tag;

issue a first snoop request to a first peripheral when the first address tag is associated with a shared state in the snoop filter bank;

if the first snoop request returns a first value, respond to the first read request with the first value; and

retrieve a second value from an external memory and respond to the first read request with the second value if the first snoop request does not return a value.

2 . The system of claim 1 , wherein the controller is configured to apply the first address tag to the snoop filter bank to determine that the first address tag is associated with the shared state.

3 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank, wherein the controller is configured to:

receive a second read request that includes a second address tag;

determine that a third value associated with the second address tag is stored in the memory bank; and

retrieve the third value from the memory bank when the second address tag is associated with an invalid state in the snoop filter bank.

4 . The system of claim 3 , wherein the controller is configured to retrieve the third value from the memory bank without issuing a snoop request.

5 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank, wherein the controller is configured to:

receive a second read request that includes a second address tag;

determine that a third value associated with the second address tag is stored in the memory bank; and

retrieve the third value from the memory bank when the second address tag is associated with the shared state in the snoop filter bank.

6 . The system of claim 5 , wherein the controller is configured to retrieve the third value from the memory bank without issuing a snoop request.

7 . The system of claim 1 , wherein the controller is configured to:

receive a second read request that includes a second address tag; and

retrieve a third value from the external memory when the second address tag is associated with an invalid state in the snoop filter bank.

8 . The system of claim 1 , wherein the controller is configured to:

receive a second read request that includes a second address tag; and

issue a second snoop request to a second peripheral when the second address tag is associated with a unique state in the snoop filter bank;

if the second snoop request returns a third value, respond to the second read request with the third value; and

retrieve a fourth value from the external memory and respond to the second read request with the fourth value if the second snoop request does not return a value.

9 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank, wherein the controller is configured to:

receive a write request that includes a second address tag; and

determine that a third value associated with the second address tag is stored in the memory bank; and

write a fourth value associated with the second address tag to the memory bank when the second address tag is associated with an invalid state in the snoop filter bank.

10 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank, wherein the controller is configured to:

receive a write request that includes a second address tag; and

determine that a third value associated with the second address tag is stored in the memory bank; and

when the second address tag is associated with a unique state in the snoop filter bank:

issue a second snoop request to a second peripheral associated with the second address tag to invalidate the third value stored by the second peripheral; and

write a fourth value associated with the second address tag to the memory bank.

11 . The system of claim 1 , wherein the controller is configured to:

receive a write request that includes a second address tag; and

write a third value associated with the second address tag to the external memory when the second address tag is associated with an invalid state in the snoop filter bank.

12 . The system of claim 1 , wherein the controller is configured to:

receive a write request that includes a second address tag; and

when the second address tag is associated with the shared state in the snoop filter bank:

issue a second snoop request to a second peripheral associated with the second address tag to invalidate a third value stored by the second peripheral; and

write a fourth value associated with the second address tag to the external memory.

13 . The system of claim 1 , wherein the controller is configured to:

determine that the snoop filter bank stores an identifier of the first peripheral, wherein the identifier is associated with the first address tag; and

determine that the snoop filter bank indicates that data associated with the first address tag is stored in a cache of the first peripheral.

14 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank, wherein the cache tag bank is configured to be shared by the snoop filter bank and the memory bank.

15 . The system of claim 1 , further comprising a memory bank coupled to the cache tag bank,

wherein the cache tag bank is a common cache tag bank, and

wherein the snoop filter bank and the memory bank share the common cache tag bank.

16 . A method comprising:

receiving, at a controller, a first read request that includes a first address tag;

issuing, by the controller, a first snoop request to a first peripheral when the first address tag is associated with a shared state in a snoop filter bank;

receiving, at the controller, a first value from the first peripheral after issuing the first snoop request;

responding, by the controller, to the first read request with the first value;

receiving, at the controller, a second read request that includes a second address tag;

issuing, by the controller, a second snoop request to a second peripheral when the second address tag is associated with the shared state in the snoop filter bank; and

retrieving, by the controller, a second value from an external memory and responding to the second read request with the second value when the second snoop request does not return a value.

17 . The method of claim 16 , further comprising:

receiving a third read request that includes a third address tag;

determining that a third value associated with the third address tag is stored in a memory bank; and

retrieving the third value from the memory bank when the third address tag is associated with an invalid state or the shared state in the snoop filter bank.

18 . The method of claim 16 , further comprising:

receiving a write request that includes a third address tag;

determining that a third value associated with the third address tag is stored in a memory bank; and

write a fourth value associated with the second address tag to the memory bank when the third address tag is associated with an invalid state in the snoop filter bank.

19 . The method of claim 16 , further comprising:

receiving a write request that includes a third address tag;

determining that a third value associated with the third address tag is stored in a memory bank; and

when the third address tag is associated with a unique state in the snoop filter bank:

issuing a third snoop request to a third peripheral associated with the third address tag to invalidate the third value stored by the third peripheral; and

writing a fourth value associated with the third address tag to the memory bank.

20 . The method of claim 16 , further comprising:

receiving a write request that includes a third address tag; and

writing a third value associated with the third address tag to the external memory when the third address tag is associated with an invalid state in the snoop filter bank.