SEMICONDUCTOR COMPONENTS HAVING CONDUCTIVE VIAS WITH ALIGNED BACK SIDE CONDUCTORS
A semiconductor component includes a semiconductor substrate, conductive vias in the substrate having terminal portions, a polymer layer on the substrate and back side conductors formed by the terminal portions of the conductive vias embedded in the polymer layer. A stacked semiconductor component includes a plurality of components having aligned conductive vias in electrical communication with one another.
1 . (canceled)
2 . A semiconductor device, comprising:
a semiconductor substrate having a first substrate surface and a second substrate surface opposite the first substrate surface;
a conductive layer carried by the first substrate surface and having a first outer surface facing away from the first substrate surface;
a polymer layer carried by the second substrate surface and having a second outer surface facing away from the second substrate surface; and
a conductive via extending through the semiconductor substrate, wherein:
the conductive via comprises a conductive material and an insulator circumferentially lining the conductive material, wherein the conductive material extends from a first end coplanar with the first outer surface to a second end coplanar with the second outer surface, and wherein the insulator extends from an inner surface of the conductive layer facing the first substrate layer to the second outer surface, and
the conductive layer is electrically coupled between the conductive via and one or more integrated circuits formed in the semiconductor substrate at the first substrate surface.
3 . The semiconductor device of claim 2 wherein:
the conductive via has a first diameter; and
the semiconductor device further comprises a terminal contact electrically coupled to the second end of the conductive via, wherein the terminal contact has a second diameter greater than the first diameter.
4 . The semiconductor device of claim 2 , further comprising a redistribution conductor carried by the second outer surface of the polymer layer and electrically coupled to the second end of the conductive via.
5 . The semiconductor device of claim 4 wherein:
the redistribution conductor comprises a first portion in contact with the second end of the conductive via and a second portion extending laterally away from the first portion; and
the semiconductor device further comprises a terminal contact electrically coupled to the second portion of the redistribution conductor.
6 . The semiconductor device of claim 2 , further comprising a dielectric layer carried by the conductive layer, wherein the dielectric layer includes an opening aligned with the first end of the conductive via to allow a peripheral semiconductor device to be coupled to the conductive material in the conductive via.
7 . The semiconductor device of claim 2 wherein the conductive via is an individual one of a plurality of conductive vias, and wherein each of the plurality of conductive vias extends from the first outer surface of the conductive layer to the second outer surface of the polymer layer through the semiconductor substrate.
8 . The semiconductor device of claim 2 , wherein the polymer layer has a thickness between 5 and 10 micrometers.
9 . A stacked semiconductor device, comprising:
a plurality of semiconductor components in a stacked array, each semiconductor component comprising:
a semiconductor substrate having a circuit side and a back side opposite the circuit side;
a conductive layer carried by the circuit side and having an inner surface facing the circuit side and a first outer surface opposite the inner surface;
a polymer layer carried by the back side and having a second outer surface facing away from the back side; and
a conductive via extending through the semiconductor substrate, wherein the conductive via comprises:
a conductive material extending from a first end coplanar with the first outer surface to a second end coplanar with the second outer surface; and
an insulator circumferentially lining the conductive material, the insulator extending from the inner surface to the second outer surface,
wherein the plurality of semiconductor components are stacked back side to circuit side with the second end of the conductive via of a first semiconductor component electrically coupled to the first end of the conductive via of a second semiconductor component adjacent to the first semiconductor component.
10 . The stacked semiconductor device of claim 9 wherein:
the second semiconductor component further comprises a dielectric layer carried by the conductive layer, wherein the dielectric layer includes an opening aligned with the first end of the conductive via; and
the stacked semiconductor device further comprises terminal contact bonding the second end of the conductive via of the first semiconductor component bonded to the first end of the conductive via of the second semiconductor component through the opening in the dielectric layer.
11 . The stacked semiconductor device of claim 9 further comprising a base substrate carrying each of the plurality of semiconductor components.
12 . The stacked semiconductor device of claim 9 wherein, for each of the plurality of semiconductor components, the conductive via has an inner-via diameter generally uniform throughout the conductive via.
13 . The stacked semiconductor device of claim 12 wherein each semiconductor component comprises one or more under bump metallization layers electrically coupled to the second end of the conductive via, wherein each of the one or more under bump metallization layers has a metallization layer diameter generally equal to the inner-via diameter.
14 . The stacked semiconductor device of claim 12 wherein the first semiconductor component further comprises a redistribution conductor carried by the second outer surface of the polymer layer and electrically coupled to the second end the conductive via.
15 . The stacked semiconductor device of claim 12 wherein, for each of the plurality of semiconductor components, the conductive via is an individual one of a plurality of conductive vias, and wherein each of the plurality of conductive vias extends from the first outer surface of the conductive layer to the second outer surface of the polymer layer through the semiconductor substrate.
16 . A stacked semiconductor device, comprising:
a first semiconductor component, the first semiconductor component comprising:
a first semiconductor substrate having a first circuit side and a first back side opposite the first circuit side;
a first polymer layer carried by the first back side and having a first outer surface facing away from the back side; and
a first conductive via extending through the first semiconductor substrate from a first end to a second end opposite the first end, wherein the second end is coplanar with the first outer surface of the first polymer layer; and
a second semiconductor component carried by the first semiconductor component, the second semiconductor component comprising:
a second semiconductor substrate having a second circuit side and a second back side opposite the second circuit side, wherein the second back side faces the first circuit side of the first semiconductor component;
a second polymer layer carried by the second back side and having a second outer surface facing away from the back side; and
a second conductive via extending through the second semiconductor substrate from third end to a fourth end opposite the third end, wherein the fourth end is coplanar with the second outer surface of the second polymer layer, and wherein the fourth end is electrically coupled to the first end of the first conductive via.
17 . The stacked semiconductor device of claim 16 , further comprising a terminal contact bonding the fourth end of the second conductive via to the first end of the first conductive via.
18 . The stacked semiconductor device of claim 16 , wherein the first semiconductor component further comprises a conductive layer carried by the first circuit side of the first semiconductor substrate, wherein the conductive layer is in contact with a sidewall of the first conductive via, and wherein an outer surface of the conductive layer is coplanar with the first end of the conductive via.
19 . The stacked semiconductor device of claim 18 , further comprising a dielectric layer carried by the conductive layer, wherein the dielectric layer includes an opening aligned with the first end of the first conductive via.
20 . The stacked semiconductor device of claim 16 wherein the second semiconductor component further comprises a redistribution conductor carried by the second outer surface of the second polymer layer and electrically coupled between the fourth end the second conductive via and the first end of the first conductive via.
21 . The stacked semiconductor device of claim 16 wherein the redistribution conductor includes a first portion electrically coupled to the fourth end of the second conductive via and a second portion laterally offset from the first portion.