CLOCK SIGNAL DISTRIBUTION USING PHOTONIC FABRIC

1 - 20 . (canceled)

21 . A circuit package comprising:

an integrated circuit comprising a plurality of processing elements that each include photonic-channel interfaces; and

a plurality of photonic channels connecting the plurality of processing elements via the photonic-channel interfaces to form at least part of an electro-photonic network, a sub-plurality of the plurality of photonic channels being connected to an individual processing element of the plurality of processing elements, the individual processing element including a message router operably coupled to the photonic-channel interfaces, the individual processing element being configured to perform the operations of:

performing clock data recovery on an incoming bit stream received via a master photonic channel of the sub-plurality of photonic channels to reconstruct a transmit clock;

generating, based on the transmit clock, a local clock signal used by the individual processing element to perform one or more local operations on the individual processing element; and

transmitting, over one or more additional photonic channels of the sub-plurality of photonic channels, a distributed clock signal within one or more outgoing bit streams to a set of the plurality of processing elements connected to the individual processing element, the one or more additional photonic channels being different photonic channels than the master photonic channel, the transmitting the distributed clock signal within one or more outgoing bit streams comprising:

generating, based on the local clock signal, the distributed clock signal in an electrical form;

generating, based on the distributed clock signal, the one or more outgoing bit streams; and

transforming the distributed clock signal in the one or more outgoing bit streams from the electrical form to an optical form using the photonic-channel interface of the individual processing element.

22 . The circuit package of claim 21 , wherein:

the individual processing element comprises a jitter-attenuating phase-lock loop (PLL) configured to generate a low jitter clock signal based on the transmit clock; and

generating, based on the transmit clock, a local clock signal includes generating the local clock signal based on the low jitter clock signal.

23 . The circuit package of claim 21 , wherein the individual processing element is configured to select the master photonic channel from the sub-plurality of photonic channels.

24 . The circuit package of claim 21 , wherein the individual processing element is configured to select the one or more additional photonic channels from the sub-plurality of photonic channels.

25 . The circuit package of claim 21 , wherein the individual processing element is configured to perform a channel alignment operation on the master photonic channel between the individual processing element and a transmitting processing element of the plurality of processing elements, the channel alignment operation adjusting one or more settings of the individual processing element to compensate for clock skew between the individual processing element and the transmitting processing element.

26 . The circuit package of claim 25 , wherein the individual processing element is configured to perform a channel alignment operation on each of the sub-plurality of the plurality of photonic channels between the individual processing element and the set of the plurality of processing elements, the channel alignment operation adjusting one or more settings of the individual processing element to compensate for clock skew between the individual processing element and the set of the plurality of processing elements.

27 . The circuit package of claim 21 , wherein the individual processing element is configured to transmit the distributed clock signal to the set of processing elements by transmitting the one or more outgoing bit streams to the set of processing elements, the distributed clock signal being used to provide the transmit clock in each of the one or more outgoing bit streams.

28 . The circuit package of claim 21 , wherein the message router is configured to operate based on the local clock signal.

29 . The circuit package of claim 21 , wherein the individual processing element comprises a hardware circuit for computing one or more dot products between at least two vectors, the hardware circuit being configured to operate based on the local clock signal.

30 . The circuit package of claim 21 , wherein:

the individual processing element is a first processing element, the sub-plurality of photonic channels is a first sub-plurality of photonic channels, the master photonic channel is a first master photonic channel, the one or more additional photonic channels is a first set of additional photonic channels, the incoming bit stream is a first incoming bit stream, the local clock signal is a first local clock signal, the transmit clock is a first transmit clock, and the distributed clock signal is a first distributed clock signal; and

a second sub-plurality of the plurality of photonic channels is connected to a second processing element, the second processing element being included in the set of processing elements connected to the first processing element, the second sub-plurality of the plurality of photonic channels including an individual photonic channel of the one or more additional photonic channels that connects the first processing element to the second processing element, the second processing element being configured to perform the operations of:

performing clock data recovery on a second incoming bit stream received via a second master photonic channel of the second sub-plurality of photonic channels to reconstruct a second transmit clock;

generating, based on the second transmit clock, a second local clock signal used by the second processing element to perform one or more local operations on the second processing element; and

transmitting, over the one or more additional photonic channels of the second sub-plurality of photonic channels, a second distributed clock signal within one or more second outgoing bit streams to a set of the plurality of processing elements connected to the second processing element, the one or more additional photonic channels of the second sub-plurality of photonic channels being different photonic channels than the second master photonic channel, the transmitting the second distributed clock signal within one or more second outgoing bit streams comprising:

generating, based on the second local clock signal, the second distributed clock signal in an electrical form;

generating, based on the second distributed clock signal, the one or more second outgoing bit streams; and

transforming the second distributed clock signal in the one or more second outgoing bit streams from the electrical form to an optical form using the photonic-channel interface of the individual processing element.

31 . The circuit package of claim 30 , wherein the first processing element comprises a first set of components, the second processing element comprises a second set of components, the first set of components comprising at least one of a first tensor processor, a first message router that includes a photonic-channel interface, or a first hardware circuit for computing one or more first dot products between at least two vectors, the second set of components comprising at least one of a second tensor processor, a second message router that includes a photonic-channel interface, or a second hardware circuit for computing one or more second dot products between at least two vectors, the first set of components being configured to operate based on the first local clock signal, and the second set of components being configured to operate based on the second local clock signal.

32 . A method for clock signal distribution, the method comprising:

performing, by an individual processing element of a plurality of processing elements, clock data recovery on an incoming bit stream from a master photonic channel of a plurality of photonic channels to construct a transmit clock, wherein the plurality of processing elements form part of an integrated circuit of a circuit package, the plurality of processing elements being connected together by the plurality of photonic channels to form at least part of an electro-photonic network within the circuit package;

generating, based on the transmit clock, by the individual processing element, a local clock signal used by the individual processing element to perform one or more local operations on the individual processing element; and

transmitting, by the individual processing element and over one or more additional photonic channels of the plurality of photonic channels, a distributed clock signal within one or more outgoing bit streams to a set of the plurality of processing elements connected to the individual processing element, the distributed clock signal being generated based on the local clock signal, the transmitting the distributed clock signal within one or more outgoing bit streams comprising:

generating, based on the local clock signal, the distributed clock signal in an electrical form;

generating, based on the distributed clock signal, the one or more outgoing bit streams;

transforming the distributed clock signal in the one or more outgoing bit streams from the electrical form to an optical form using a photonic-channel interface of the individual processing element; and

routing the one or more outgoing bit streams including the distributed clock signal in the optical form across the one or more additional photonic channels.

33 . The method of claim 32 , wherein:

the individual processing element comprises a jitter-attenuating phase-lock loop (PLL) configured to generate a low jitter clock signal based on the transmit clock, and generating, based on the local clock signal, the distributed clock signal in an electrical form includes generating the local clock signal based on the low jitter clock signal.

34 . The method of claim 32 , further comprising:

selecting the master photonic channel from the plurality of photonic channels with the individual processing element; and

selecting the one or more additional photonic channels from the plurality of photonic channels with the individual processing element.

35 . The method of claim 32 , further comprising:

receiving the one or more outgoing bit streams including the distributed clock signal in the optical form at photonic interfaces of the set of the plurality of processing elements; and

transforming the distributed clock signal in the one or more outgoing bit streams from the optical form to the electrical form in the set of the plurality of processing elements using associated photonic channel interfaces.

36 . The method of claim 32 , further comprising performing, by the individual processing element, a channel alignment operation on the master photonic channel between the individual processing element and a transmitting processing element of the plurality of processing elements, the channel alignment operation adjusting one or more settings of the individual processing element to compensate for clock skew between the individual processing element and the transmitting processing element.

37 . The method of claim 32 , further comprising performing a channel alignment operation on each of the one or more additional photonic channels between the individual processing element and the set of the plurality of processing elements, the channel alignment operation adjusting one or more settings of the individual processing element to compensate for clock skew between the individual processing element and the set of the plurality of processing elements.

38 . The method of claim 32 , wherein the individual processing element comprises a set of components, the set of components comprising at least one of a tensor processor, a message router that includes photonic-channel interfaces, or a hardware circuit for computing a dot product between at least two vectors, the set of components being configured to operate based on the local clock signal.