IP Library Patent Application 19261928
Patent Application
App. No. 19/261,928

PROCESSING STACKED SUBSTRATES

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Quick Facts
Patent No.
US None
App. No.
19/261,928
Abstract

Representative implementations provide techniques for processing integrated circuit (IC) dies and related devices, in preparation for stacking and bonding the devices. The disclosed techniques provide removal of processing residue from the device surfaces while protecting the underlying layers. One or more sacrificial layers may be applied to a surface of the device during processing to protect the underlying layers. Processing residue is attached to the sacrificial layers instead of the device, and can be removed with the sacrificial layers.

Claims (8)

1 . A method of forming a microelectronic assembly, comprising:

providing a first substrate having an exposed conductive wiring layer level with or below a bonding surface of the first substrate;

coating the conductive wiring layer with one or more protective sacrificial layers;

bonding a second substrate to the one or more protective sacrificial layers using a temporary bonding layer;

removing the second substrate;

removing the temporary bonding layer;

exposing the first substrate, the one or more protective sacrificial layers, and a residue of the temporary bonding layer to a wet etchant for a preselected duration of time, the wet etchant decomposing at least one protective sacrificial layer, wherein the wet etchant comprises a complexing agent adapted to suppress dissolution of the conductive wiring layer; and

washing said at least one protective sacrificial layer and the residue of the temporary bonding layer from the conductive wiring layer.