SYSTEMS AND METHODS FOR LED WITH STACKED BONDING STRUCTURES
A micro-display chip comprises a micro light-emitting diode (micro-LED) array having a plurality of micro-LEDs. A micro-LED includes a substrate having a circuit and a metal layer disposed on the substrate and in electrical contact with the circuit. The micro-LED further includes a light emitting layer disposed on the metal layer and an isolation layer covering a sidewall of the light emitting layer. An opening is formed in the isolation layer and exposes at least a portion of a surface of the light emitting layer. The micro-LED further includes a conductive layer disposed on the isolation layer, wherein at least a portion of the conductive layer is disposed in the opening and in contact with the at least a portion of the surface of the light emitting layer.
1 . A micro-display chip, comprising a micro light-emitting diode (micro-LED) array having a plurality of micro-LEDs, wherein at least one of the plurality of micro-LEDs includes:
a substrate having a circuit;
a metal layer disposed on the substrate and in contact with the circuit;
a light emitting layer disposed on the metal layer;
an isolation layer covering a sidewall of the light emitting layer, wherein an opening is formed in the isolation layer and exposes at least a portion of a surface of the light emitting layer; and
a conductive layer disposed on the isolation layer, wherein at least a portion of the conductive layer is disposed in the opening and in contact with the at least a portion of the surface of the light emitting layer.
2 . The micro-display chip of claim 1 , wherein:
the light emitting layer includes, in sequence, a layer of a first type, a multi-quantum well layer, and a layer of a second type; and
the opening exposes at least a portion of a surface of the layer of the first type or at least a portion of a top surface of the layer of the second type.
3 . The micro-display chip of claim 2 , wherein the conductive layer connects to the layer of the second type via the opening.
4 . The micro-display chip of claim 2 , wherein:
a bottom region or a bottom layer of the light emitting layer includes a protrusion; and
the bottom region or the bottom layer of the light emitting layer including the protrusion has a greater lateral dimension than a top region or a top layer of the light emitting layer.
5 . The micro-display chip of claim 4 , wherein the protrusion connects to the conductive layer via the opening.
6 . The micro-display chip of claim 1 , wherein the at least one of the plurality of micro-LEDs further includes an electrode, wherein:
the electrode extends from the metal layer to a top region or a top layer of the light emitting layer;
the isolation layer extends around the electrode; and
the electrode connects to the substrate via the metal layer.
7 . The micro-display chip of claim 1 , wherein the at least one of the plurality of micro-LEDs further includes a dielectric layer disposed between the metal layer and the light emitting layer.
8 . The micro-display chip of claim 7 , wherein the dielectric layer includes an insulating layer, or the dielectric layer includes a reflective structure and/or a metallic layer.
9 . The micro-display chip of claim 8 , wherein:
the reflective structure includes a plurality of layers with different reflective indices alternating, or a plurality of layers with different materials; and
the metallic layer includes a plurality of layers of gold (Au) and/or indium tin oxide (ITO).
10 . The micro-display chip of claim 9 , wherein:
the reflective structure includes a plurality of silicon dioxide (SiO 2 ) and titanium pentoxide (Ti 3 O 5 ) layers; and
the insulating layer includes a SiO 2 layer.
11 . The micro-display chip of claim 1 , wherein:
the light emitting layer includes an epitaxial layer having an III-V nitride, III-V arsenide, III-V phosphide, and/or III-V antimonide epitaxial structure;
the light emitting layer emits ultraviolet (UV), blue, green, orange, red, or infrared light; and
the light emitting layer includes a GaN-based, an AlInGaP-based, or a GaAs-based or InP-based light emitting layer.
12 . The micro-display chip of claim 11 , wherein films within the light emitting layer includes (i) a P-type GaN layer, an InGaN light-emitting layer, and an N-type GaN layer, or (ii) a P-type GaP layer, a P-type AlInGaP light-emitting layer, an AlGaInP layer, an N-type AlInGaP layer, and an N-type GaAs layer.
13 . The micro-display chip of claim 12 , wherein a respective P-type layer is magnesium-doped (Mg-doped), and a respective N-type layer is silicon-doped (Si-doped).
14 . The micro-display chip of claim 1 , wherein a thickness of the light emitting layer ranges from about 0.3 μm to about 5.0 μm.
15 . The micro-display chip of claim 1 , wherein the light emitting layer includes a PN junction having a p-type region/layer and an n-type region/layer, and active layer between the p-type region/layer and n-type region/layer.
16 . The micro-display chip of claim 1 , wherein the metal layer includes Au—Au bonding, Au—Sn bonding, Au—In bonding, Ti—Ti bonding, Cu—Cu bonding, or a combination thereof; wherein:
the Au—Au bonding includes a first Au layer and a second Au layer, each having a chromium (Cr) coating configured as an adhesive layer and a platinum (Pt) coating;
the Cr coating is positioned between each of the Au layers and the corresponding Cr coating; and
the Cr coating and the Pt coating are positioned on the top and bottom of each of the bonded first and second Au layers.
17 . The micro-display chip of claim 16 , wherein the first Au layer and the second Au layer mutually diffuse into each other.
18 . The micro-display chip of claim 1 , wherein the metal layer includes one or more ohmic contact layers.