Hybrid Power Transistor Apparatus and Control Method for Ringing Reduction in Step-Down Power Converters

1 . An apparatus comprising:

a high-side switch comprising a first high-side switching element and a second high-side switching element coupled in parallel between a first terminal and a switching node;

a low-side switch comprising a first low-side switching element and a second low-side switching element coupled in parallel between a second terminal and the switching node; and

a controller configured to generate drive signals for the high-side switch and the low-side switch, wherein:

a high-side conduction period is defined by both the first high-side switching element and the second high-side switching element being in an on state;

a low-side conduction period is defined by both the first low-side switching element and the second low-side switching element being in an on state; and

during a transition from the high-side conduction period to the low-side conduction period, the controller is configured to:

turn off the first high-side switching element while maintaining the second high-side switching element in an on state;

subsequently, turn on the low-side switch by substantially simultaneously turning on both the first low-side switching element and the second low-side switching element while the second high-side switching element remains in the on state; and

subsequently turn off the second high-side switching element.

2 . The apparatus of claim 1 , further comprising:

a first high-side driver and a second high-side driver coupled to the first and second high-side switching elements, respectively, wherein the controller provides signals to the first high-side driver and the second high-side driver; and

a first low-side driver and a second low-side driver coupled to first and second low-side switching elements of the low-side switch, respectively, wherein the controller provides signals to the first low-side driver and the second low-side driver.

3 . The apparatus of claim 1 , wherein:

the first high-side switching element comprises a first number of transistor cells connected in parallel, and the second high-side switching element comprises a second number of transistor cells connected in parallel, wherein:

the first number is greater than the second number; and

an on-resistance of the second high-side switching element is greater than an on-resistance of the first high-side switching element.

4 . The apparatus of claim 1 , wherein:

the first low-side switching element comprises a first number of transistor cells connected in parallel, and the second low-side switching element comprises a second number of transistor cells connected in parallel, wherein:

the first number is greater than the second number; and

an on-resistance of the second low-side switching element is greater than an on-resistance of the first low-side switching element.

5 . The apparatus of claim 1 , wherein:

the first terminal is coupled to an input voltage bus and the second terminal is coupled to ground, and wherein the high-side switch and the low-side switch together with an inductor form a step-down converter having an output bus coupled to the switching node through the inductor.

6 . The apparatus of claim 1 , wherein:

the controller is further configured such that during a transition from the low-side conduction period to the high-side conduction period:

the controller turns on the second high-side switching element for a predetermined period to connect an on-resistance of the second high-side switching element in series with a parasitic inductance of the high-side switch and a parasitic capacitance of the low-side switch to damp an LC oscillation; and

subsequently, after a predetermined delay, the controller turns on the first high-side switching element.

7 . The apparatus of claim 1 , wherein:

the high-side switch is integrated in a semiconductor package having a drain terminal connected to the first terminal, a source terminal connected to the switching node, a first gate terminal for the first high-side switching element, and a second gate terminal for the second high-side switching element.

8 . A method for controlling a power converter, the method comprising:

defining a high-side conduction period by both the first high-side switching element and the second high-side switching element being in an on state;

defining a low-side conduction period by both the first low-side switching element and the second low-side switching element being in an on state; and

during a transition from the high-side conduction period to the low-side conduction period:

turning off a first high-side switching element of a high-side switch while maintaining a second high-side switching element of the high-side switch in an on state;

subsequently, turning on a low-side switch by substantially simultaneously turning on both a first low-side switching element and a second low-side switching element of the low-side switch, wherein the second high-side switching element remains in the on state; and

subsequently, turning off the second high-side switching element.

9 . The method of claim 8 , wherein:

the first high-side switching element comprises a first number of transistor cells connected in parallel and the second high-side switching element comprises a second number of transistor cells connected in parallel, wherein the first number is greater than the second number.

10 . The method of claim 8 , wherein:

an on-resistance of the second high-side switching element is greater than an on-resistance of the first high-side switching element; and

an on-resistance of the second low-side switching element is greater than an on-resistance of the first low-side switching element.

11 . The method of claim 8 , wherein:

the power converter is a step-down power converter.

12 . The method of claim 8 , wherein:

both the second high-side switching element of the high-side switch and the low-side switch are on in a predetermined overlap period, and wherein the predetermined overlap period prevents a body diode of the low-side switch from conducting, which in turn prevents a negative voltage from occurring on a switching node of the high-side switch and the low-side switch.

13 . The method of claim 8 , wherein:

the turning on of the low-side switch while the second high-side switching element remains in the on state is configured to reduce a dead time between the high-side conduction period and the low-side conduction period, thereby improving the efficiency of the power converter.

14 . The method of claim 8 , further comprising:

during a transition from the low-side conduction period to the high-side conduction period:

turning on the second high-side switching element for a predetermined period to connect an on-resistance of the second high-side switching element in series with a parasitic inductance of the high-side switch and a parasitic capacitance of the low-side switch to damp an LC oscillation; and

subsequently, after a predetermined delay, turning on the first high-side switching element.

15 . A system comprising:

a high-side switch comprising a first high-side switching element and a second high-side switching element coupled in parallel between a first terminal and a switching node;

a low-side switch comprising a first low-side switching element and a second low-side switching element coupled in parallel between a second terminal and the switching node; and

a controller configured to generate drive signals for the high-side switch and the low-side switch, wherein:

a high-side conduction period is defined by both the first high-side switching element and the second high-side switching element being in an on state;

a low-side conduction period is defined by both the first low-side switching element and the second low-side switching element being in an on state; and

during a transition from the high-side conduction period to the low-side conduction period, the controller is configured to:

turn off the first high-side switching element while maintaining the second high-side switching element in an on state;

subsequently, turn on the low-side switch by substantially simultaneously turning on both the first low-side switching element and the second low-side switching element while the second high-side switching element remains in the on state; and

subsequently turn off the second high-side switching element.

16 . The system of claim 15 , further comprising:

a first high-side driver and a second high-side driver coupled to the first and second high-side switching elements, respectively, wherein the controller provides signals to the first high-side driver and the second high-side driver; and

a first low-side driver and a second low-side driver coupled to first and second low-side switching elements of the low-side switch, respectively, wherein the controller provides signals to the first low-side driver and the second low-side driver.

17 . The system of claim 15 , wherein:

an on-resistance of the second high-side switching element is greater than an on-resistance of the first high-side switching element; and

an on-resistance of the second low-side switching element is greater than an on-resistance of the first low-side switching element.

18 . The system of claim 15 , further comprising:

an inductor coupled between the switching node and an output terminal; and

an output capacitor coupled between the output terminal and ground, wherein the high-side switch, the low-side switch, the inductor and the output capacitor form a step-down power converter.

19 . The system of claim 15 , wherein:

the controller maintains the second high-side switching element in an on state during a transition from the high-side conduction period to the low-side conduction period to prevent a negative voltage from occurring on the switching node.

20 . The system of claim 15 , wherein:

the controller is further configured such that during a transition from the low-side conduction period to the high-side conduction period, the controller turns on the second high-side switching element for a predetermined period to connect an on-resistance of the second high-side switching element in series with a parasitic inductance of the high-side switch and a parasitic capacitance of the low-side switch to damp an LC oscillation, and subsequently, after a predetermined delay, the controller turns on the first high-side switching element.