ARRANGEMENT AND METHOD FOR TESTING AN INVERTER AND/OR A CONVERTER

1 . A system for testing an inverter and/or a converter, comprising:

a first emulation device configured to emulate a power generator;

a second emulation device configured to emulate a power consumer; and

a control device;

wherein the inverter and/or the converter is connected between the first emulation device and the second emulation device and has a direct current (DC) link capacitor connected in parallel;

wherein the first emulation device comprises at least one first current-optimized load module;

wherein the second emulation device comprises at least one parallel circuit composed of a second dynamics-optimized load module and a second current-optimized load module;

wherein the first current-optimized load module and the second current-optimized load module each comprise an at least two-stage inverter;

wherein the second dynamics-optimized load module comprises an at least three-stage inverter; and

wherein the control device is configured to:

control the second current-optimized load module based on a low-pass-filtered output voltage of the inverter and/or the converter; and

control the second dynamics-optimized load module based on a high-pass-filtered output voltage of the inverter and/or the converter.

2 . The system according to claim 1 , wherein the inverter and/or the converter are of three-phase design;

wherein the second emulation device comprises a respective parallel circuit composed of the second dynamics-optimized load module and the second current-optimized load module for each phase; and

wherein the control device is configured to:

control the second current-optimized load module of the respective phase based on the low-pass-filtered output voltage of the respective phase of the inverter and/or the converter; and

control the second dynamics-optimized load module of the respective phase based on the high-pass-filtered output voltage of the respective phase of the inverter and/or the converter.

3 . The system according to claim 1 , wherein the system comprises the inverter; and

wherein the control device is configured to control the first current-optimized load module based on an input current of the inverter.

4 . The system according to claim 3 , wherein the first emulation device comprises at least one parallel circuit composed of a first current-optimized load module and the first dynamics-optimized load module; and

wherein the control device is configured to:

control the first current-optimized load module based on a low-pass-filtered input current of the inverter; and

control the first dynamics-optimized load module based on a high-pass-filtered input current of the inverter.

5 . The system according to claim 3 , wherein the first emulation device comprises at least two parallel circuits composed of a respective first current-optimized load module and a respective first dynamics-optimized load module; and

wherein the control device is configured to:

control the respective first current-optimized load modules based on a low-pass-filtered input current of the inverter; and

control the respective first dynamics-optimized load modules based on a high-pass-filtered input current of the inverter.

6 . The system according to claim 1 , wherein the system comprises the converter;

wherein the converter is of three-phase design;

wherein the first emulation device comprises a respective parallel circuit composed of a first dynamics-optimized load module and the first current-optimized load module for each phase; and

wherein the control device is configured to:

control the first current-optimized load module of the respective phase based on the low-pass-filtered input voltage of the respective phase of the converter; and

control the first dynamics-optimized load module of the respective phase based on the high-pass-filtered input voltage of the respective phase of the converter.

7 . The system according to claim 1 , wherein the low-pass filtering is carried out at a cutoff frequency of ≤5 kHz, and the high-pass filtering is carried out at a cutoff frequency of ≥8 kHz.

8 . The system according to claim 1 , wherein the low-pass filtering is carried out at a cutoff frequency of ≤3 kHz, and the high-pass filtering is carried out at a cutoff frequency of ≥10 kHz.

9 . The system according to claim 1 , wherein the system comprises:

a plurality of first current-optimized load modules connected in series; and/or

a plurality of second current-optimized load modules connected in series.

10 . The system according to claim 1 , wherein the control device comprises a field-programmable gate array (FPGA).

11 . The system according to claim 1 , wherein the first dynamics-optimized load module and the second dynamics-optimized load module each comprise an at least seven-stage inverter.

12 . The system according to claim 1 , wherein the first emulation device comprises a battery and/or a generator; and/or

wherein the second emulation device comprises a motor and/or a power supply system.

13 . The system according to claim 1 , wherein the inverter and/or the converter is an inverter and/or a converter of a wind power plant, a power supply system, and/or a battery.

14 . A method for testing an inverter and/or a converter, comprising:

controlling, by a control device of a system, a second current-optimized load module of the system based on a low-pass-filtered output voltage of the inverter and/or the converter, and

controlling, by the control device, a second dynamics-optimized load module of the system based on a high-pass-filtered output voltage of the inverter and/or the converter;

wherein the system comprises a first emulation device configured to emulate an energy generator, a second emulation device configured to emulate an energy consumer, and the control device;

wherein the inverter and/or converter is connected between the first emulation device and the second emulation device and has a direct current (DC) link capacitor connected in parallel;

wherein the first emulation device comprises at least one first current-optimized load module;

wherein the second emulation device comprises at least one parallel circuit composed of the second dynamics-optimized load module and the second current-optimized load module;

wherein the first current-optimized load module and the second current-optimized load module each comprise an at least two-stage inverter; and

wherein the second dynamics-optimized load module comprises an at least three-stage inverter.