SYSTEMS AND METHODS FOR CONTROLLING VALVE ACTUATORS
Systems and methods for controlling valve actuators are provided. The system includes an interface circuit in electrical communication with a wiring connection from a pool/spa control system, and a processor in communication with the interface circuit. The interface circuit extracts a plurality of encoded bits transmitted to the interface circuit from the pool/spa control system over the wiring connection. The plurality of encoded bits could include Manchester-encoded bits that are encoded by the pool/spa control system by altering signals transmitted to the interface circuit over the wiring connection. The processor receives the plurality of encoded bits from the interface circuit and processes the plurality of encoded bits into a control command for controlling operation of the valve actuator. When a valid control command has been generated, the processor executes the control command to operate the valve actuator in accordance with the control command.
1 . A system for controlling a valve actuator, comprising:
an interface circuit in electrical communication with a pool/spa control system, the interface circuit extracting a plurality of encoded bits transmitted to the interface circuit from the pool/spa control system over a wiring connection; and
a processor in communication with the interface circuit, the processor receiving the plurality of encoded bits from the interface circuit, the processor executing firmware for processing the plurality of encoded bits into a control command for controlling operation of the valve actuator in response to the plurality of encoded bits and executing the control command to operate the valve actuator in accordance with the control command.
2 . The system of claim 1 , wherein the plurality of encoded bits comprise Manchester-encoded bits.
3 . The system of claim 1 , wherein the interface extracts the plurality of encoded bits from clockwise and counterclockwise conductors of the wiring connection.
4 . The system of claim 1 , wherein the interface circuit generates a clockwise control signal, a counterclockwise control signal, and a phase signal from the wiring connection by the interface circuit.
5 . The system of claim 1 , wherein the processor controls operation of a valve actuation motor of the valve actuator to move a valve coupled to the valve actuation in accordance with the control command.
6 . The system of claim 1 , wherein the control command further comprises a start field, a register field, and a data field, the register field specifying a type of the control command.
7 . The system of claim 6 , wherein the control command comprises one of a reset command, a mode command, a setpoint command, a sweep rate command, a dwell command, a sweep effect command, a sprinkler command, a stagger command, a retrace steps command, a service mode position command, an error position command, and an engineering position command.
8 . The system of claim 7 , wherein the mode command instructs the valve actuator to operate in a mode comprising a default operation mode, a proportional operation mode, a tracking mode, a sweep mode, a service mode, or an error mode.
9 . The system of claim 1 , wherein processor constructs a packet from the plurality of encoded bits received by the interface circuit.
10 . The system of claim 9 , wherein the packet includes a plurality of register bits, a plurality of data bits, and at least one cyclic redundancy check (CRC) or parity bit.
11 . The system of claim 9 , wherein the processor validates the packet prior to executing the packet.
12 . A method for controlling a valve actuator, comprising:
extracting by an interface circuit in electrical communication with a pool/spa control system a plurality of encoded bits transmitted to the interface circuit from the pool/spa control system over a wiring connection;
receiving the plurality of encoded bits by a processor in communication with the interface circuit;
processing the plurality of encoded bits by the processor into a control command for controlling operation of the valve actuator in response to the plurality of encoded bits; and
executing the control command by the processor to operate the valve actuator in accordance with the control command.
13 . The method of claim 12 , wherein the plurality of encoded bits comprise Manchester-encoded bits.
14 . The method of claim 12 , further comprising extracting the plurality of encoded bits from clockwise and counterclockwise conductors of the wiring connection.
15 . The method of claim 12 , further comprising generating by the interface circuit a clockwise control signal, a counterclockwise control signal, and a phase signal from the wiring connection by the interface circuit.
16 . The method of claim 12 , further comprising controlling by the processor operation of a valve actuation motor of the valve actuator to move a valve coupled to the valve actuation in accordance with the control command.
17 . The method of claim 12 , wherein the control command further comprises a start field, a register field, and a data field, the register field specifying a type of the control command.
18 . The method of claim 17 , wherein the control command comprises one of a reset command, a mode command, a setpoint command, a sweep rate command, a dwell command, a sweep effect command, a sprinkler command, a stagger command, a retrace steps command, a service mode position command, an error position command, and an engineering position command.
19 . The method of claim 18 , wherein the mode command instructs the valve actuator to operate in a mode comprising a default operation mode, a proportional operation mode, a tracking mode, a sweep mode, a service mode, or an error mode.
20 . The method of claim 12 , further comprising constructing a packet from the plurality of encoded bits received by the interface circuit.
21 . The method of claim 20 , wherein the packet includes a plurality of register bits, a plurality of data bits, and at least one cyclic redundancy check (CRC) or parity bit.
22 . The method of claim 20 , further comprising validating the packet prior to executing the packet.