IP Library › Patent Application 60366074
Patent Application Provisional
App. No. 60/366,074 · Confirmation No. 7419

Submount, pedestal, and wire bond assembly for a transistor outline package with reduced wire bond inductance

Provisional Application Expired
⬇ PDF
 Code Description Pages PDF
2002-03-19 TRNA Transmittal of New Application 1 View
2002-03-19 SPEC Specification 24 View
2002-03-19 CLM Claims 1 View
2002-03-19 ABST Abstract 1 View
2002-03-19 DRW Drawings-only black and white line drawings 13 View
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Quick Facts
App. No.
60/366,074
Filed
2002-03-19