IP Library › Patent Application 60632237
Patent Application Provisional
App. No. 60/632,237 · Confirmation No. 6677

Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (low density parity check) decoders

Provisional Application Expired
⬇ PDF
 Code Description Pages PDF
2008-08-28 EBCC.AD Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update 1 View
2004-12-01 TRNA Transmittal of New Application 3 View
2004-12-01 SPEC Specification 55 View
2004-12-01 CLM Claims 13 View
2004-12-01 ABST Abstract 1 View
2004-12-01 DRW Drawings-only black and white line drawings 37 View
2004-12-01 WFEE Fee Worksheet (SB06) 1 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
App. No.
60/632,237
Filed
2004-12-01