IP Library Patent Application 60693033
Patent Application Provisional
App. No. 60/693,033 · Confirmation No. 2156

Module having stacked chip scale semiconductor packages

Inventor: Marcos Karnezos
Provisional Application Expired
⬇ PDF
Code Description Pages PDF
2005-06-20 TRNA Transmittal of New Application 1 View
2005-06-20 SPEC Specification 12 View
2005-06-20 CLM Claims 1 View
2005-06-20 ABST Abstract 1 View
2005-06-20 DRW Drawings-only black and white line drawings 4 View
2005-06-20 WFEE Fee Worksheet (SB06) 1 View
2005-06-20 ADS Application Data Sheet 3 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
App. No.
60/693,033
Filed
2005-06-20