Patent Application
Provisional
App. No. 60/830,084
· Confirmation No. 9771
Integrated circuit having memory array having a segmented bit line architecture and method of controlling and/or operating same
Provisional Application Expired
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2011-05-18 | EBCC.AD |
Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update | 1 | View | |
| 2006-07-11 | TRNA |
Transmittal of New Application | 2 | View | |
| 2006-07-11 | SPEC |
Specification | 36 | View | |
| 2006-07-11 | DRW |
Drawings-only black and white line drawings | 31 | View | |
| 2006-07-11 | WFEE |
Fee Worksheet (SB06) | 1 | View |
Inventors
David Fisch
St-Sulpice, SWITZERLAND
Michel Bron
Lausanne, SWITZERLAND
Attorneys & Agents of Record
Prosecution
- Customer No.
- 66112
- Docket No.
- 211.037-P
- Confirmation No.
- 9771
Child
Claims priority from a provisional application
→
App. 11/821,848
· US 7,542,340
Filed 2007-06-26
· Patented Case
Child
Claims priority from a provisional application
→
App. 12/467,331
· US 7,969,779
Filed 2009-05-18
· Patented Case
Child
Claims priority from a provisional application
→
App. 13/166,291
· US 8,395,937
Filed 2011-06-22
· Patented Case
Child
PCT
Claims priority from a provisional application
→
PCT/US2007/015717
Filed 2007-07-10
· RO PROCESSING COMPLETED-PLACED IN STORAGE
No recorded assignments were found for this patent.
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Quick Facts
- App. No.
- 60/830,084
- Filed
- 2006-07-11
External Links