IP Library Granted Patent US 6,912,607
Granted Patent B2
US 6,912,607 · App. 10/068,029 · Granted Jun 28, 2005

Method and apparatus for ascertaining the status of multiple devices simultaneously over a data bus

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Quick Facts
Patent No.
US 6,912,607
App. No.
10/068,029
Granted
Jun 28, 2005
Kind
B2
Abstract

Techniques are provided for simultaneously ascertaining the status of a plurality of devices coupled to a data bus. A master device transmits at least one status request message over the data bus to a plurality of slave devices. In response, the plurality of slave devices transmit to the master device a status indicator message including a plurality of status indicators indicating statuses of the plurality of slave devices. The master device receives the status indicator message and ascertains the status of at least some of the plurality of slave devices by examining the status indicators. The status request message and/or status indicator message may be a message defined according to a protocol associated with the data bus. The data bus may, for example, be a serial data bus such as an I 2 C bus.

Claims (70)

1. In a computer system including a data bus, a method comprising steps of:

(A) transmitting a status request message over the data bus to a first plurality of devices coupled to the data bus, wherein the status request message consists of a single message defined according to a protocol associated with the data bus; and

(B) receiving over the data bus a status indicator message including a plurality of status indicators indicating statuses of the first plurality of devices.

2. The method of claim 1 , wherein the step (A) comprises steps of:

(A) (1) addressing a second plurality of devices coupled to the data bus using a primary address shared by the second plurality of devices; and

(A) (2) addressing the first plurality of devices using a secondary address shared by the first plurality of devices, wherein the first plurality of devices comprises a subset of the second plurality of devices.

3. The method of claim 2 , wherein the step (A) (1) comprises a step of transmitting the primary address over the data bus, and wherein the step (A) (2) comprises a step of transmitting the secondary address over the data bus.

4. The method of claim 1 , wherein the data bus comprises a serial data bus.

5. The method of claim 4 , wherein the data bus comprises an I 2 C bus.

6. The method of claim 1 , wherein the status indicator message comprises a message defined according to a protocol associated with the data bus.

7. The method of claim 1 , further comprising a step of:

(C) ascertaining the status of at least some of the plurality of slave devices by examining the status indicators.

8. The method of claim 1 , wherein the status indicators comprise bits.

9. The method of claim 8 , wherein the status indicators comprise IRQ status bits.

10. In a computer system including a serial data bus, a method comprising steps of:

(A) transmitting a status request message over the data bus to a first plurality of devices coupled to the data bus, wherein the status request message consists of a first message defined according to a protocol associated with the serial data bus; and

(B) receiving over the data bus a status indicator message including a plurality of status indicator bits indicating statuses of the first plurality of devices, wherein the status indicator message comprises a second message defined according to the protocol associated with the data bus.

11. In a computer system including a data bus, a device comprising:

means for transmitting a status request message over the data bus to a first plurality of devices coupled to the data bus, wherein the status request message consists of a first message defined according to a protocol associated with the serial data bus; and

means for receiving over the data bus a status indicator message including a plurality of status indicators indicating statuses of the first plurality of devices.

12. The device of claim 11 , wherein the means for transmitting comprises:

means for addressing a second plurality of devices coupled to the data bus using a primary address shared by the second plurality of devices; and

means for addressing the first plurality of devices using a secondary address shared by the first plurality of devices, wherein the first plurality of devices comprises a subset of the second plurality of devices.

13. The device of claim 12 , wherein the means for addressing the second plurality of devices comprises means for transmitting the primary address over the data bus, and wherein the means for addressing the first plurality of devices comprises means for transmitting the secondary address over the data bus.

14. The device of claim 11 , wherein the data bus comprises a serial data bus.

15. The device of claim 14 , wherein the data bus comprises an I 2 C bus.

16. The device of claim 11 , wherein the status indicator message comprises a message defined according to a protocol associated with the data bus.

17. The device of claim 11 , further comprising:

means for ascertaining the status of at least some of the plurality of slave devices by examining the status indicators.

18. The device of claim 11 , wherein the status indicators comprise bits.

19. The device of claim 18 , wherein the status indicators comprise IRQ status bits.

20. In a computer system including a serial data bus, a device comprising:

means for transmitting a status request message over the data bus to a first plurality of devices coupled to the data bus, wherein the status request message consists of a first message defined according to a protocol associated with the serial data bus; and

means for receiving over the data bus a status indicator message including a plurality of status indicator bits indicating statuses of the first plurality of devices, wherein the status indicator message comprises a second message defined according to the protocol associated with the data bus.

21. In a computer system including a data bus, a method comprising steps of:

(A) receiving a status request message over the data bus from a master device, wherein the status request message is defined as a single message according to a protocol associated with the data bus; and

(B) transmitting to the master device over the data bus a status indicator message including a plurality of status indicators indicating statuses of a plurality of slave devices coupled to the data bus.

22. The method of claim 21 , wherein the step (A) is performed by at least one slave device coupled to the data bus, and wherein the step (A) comprises steps of:

(A) (1) receiving a primary address over the data bus from the master device;

(A) (2) receiving a secondary address over the data bus from the master device;

(A) (3) determining whether the primary address is associated with the at least one slave device;

(A) (4) if it is determined in the step (A) (3) that the primary address is associated with the at least one slave device, determining whether the secondary address is associated with the at least one slave device; and

(A) (5) if it is determined in the step (A) (4) that the secondary address is associated with the at least one slave device, receiving the status request message from the master device over the data bus.

23. The method of claim 21 , wherein the data bus comprises a serial data bus.

24. The method of claim 23 , wherein the data bus comprises an I 2 C bus.

25. The method of claim 21 , wherein the status indicator message comprises a message defined according to a protocol associated with the data bus.

26. The method of claim 21 , wherein the step (B) is performed by a plurality of slave devices coupled to the data bus, each of said plurality of slave devices providing at least one of the plurality of status indicators to the status indicator message.

27. The method of claim 21 , wherein the status indicators comprise bits.

28. The method of claim 27 , wherein the status indicators comprise IRQ status bits.

29. In a computer system including a serial data bus, a method comprising steps of:

(A) receiving a status request message over the data bus from a master device, wherein the status request message consists of a first message defined according to a protocol associated with the serial data bus; and

(B) transmitting to the master device over the data bus a status indicator message including a plurality of status indicator bits indicating statuses of a plurality of slave devices coupled to the data bus, wherein the status indicator message comprises a second message defined according to the protocol associated with the serial data bus.

30. In a computer system including a data bus, a system comprising:

means for receiving a status request message over the data bus from a master device, wherein status request message is defined as a single message according to a protocol associated with the data bus; and

means for transmitting to the master device over the data bus a status indicator message including a plurality of status indicators indicating statuses of a plurality of slave devices coupled to the data bus.

31. The system of claim 30 , wherein at least one slave device coupled to the data bus includes the means for receiving, and wherein the means for receiving comprises:

means for receiving a primary address over the data bus from the master device;

means for receiving a secondary address over the data bus from the master device;

means for determining whether the primary address is associated with the at least one slave device;

means for determining whether the secondary address is associated with the at least one slave device; and

means for receiving the status request message from the master device over the data bus if it is determined that the secondary address is associated with the at least one slave device.

32. The system of claim 30 , wherein the data bus comprises a serial data bus.

33. The system of claim 32 , wherein the data bus comprises an I 2 C bus.

34. The system of claim 30 , wherein the status indicator message comprises a message defined according to a protocol associated with the data bus.

35. The system of claim 30 , wherein a plurality of slave devices coupled to the data bus include the means for transmitting, and wherein each of said plurality of slave devices comprises means for providing at least one of the plurality of status indicators to the status indicator message.

36. The system of claim 30 , wherein the status indicators comprise bits.

37. The system of claim 36 , wherein the status indicators comprise IRQ status bits.

38. In a computer system including a serial data bus, a system comprising:

means for receiving a status request message over the data bus from a master device, wherein the status request message consists of a first message defined according to a protocol associated with the serial data bus; and

means for transmitting to the master device over the data bus a status indicator message including a plurality of status indicator bits indicating statuses of a plurality of slave devices coupled to the data bus, wherein the status indicator message comprises a second message defined according to the protocol associated with the serial data bus.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2022
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 059058/0720 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →