IP Library Granted Patent US 7,282,992
Granted Patent B2
US 7,282,992 · App. 11/153,658 · Granted Oct 16, 2007

Class D-amplifier

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Quick Facts
Patent No.
US 7,282,992
App. No.
11/153,658
Granted
Oct 16, 2007
Kind
B2
Abstract

A class D-amplifier which amplifies an input signal applied to an signal input of said amplifier ( 21 ) to generate an amplified signal output by an signal output ( 28 a, 28 b ) of said amplifier comprising a comparator ( 23 ) which compares the applied input signal with a switch signal to generate a pulse width modulated signal; a driving unit ( 24 ) which amplifies the pulse width modulated signal to generate the amplified output signal; and a feedback circuit which generates the self oscillating switch signal for the comparator ( 23 ).

Claims (30)

1. A class D-amplifier which amplifies an input signal applied to an signal input of said amplifier to generate an amplified signal output by an signal output of said amplifier comprising:

(a) a comparator for comparing the applied input signal with a switch signal to generate a pulse width modulated signal;

(b) a driving unit for amplifying the pulse width modulated signal to generate the amplified output signal, wherein the driving unit comprises at least two driving stages each including two complementary MOSFETs; and

(c) a feedback circuit for generating the self oscillating switch signal for the comparator.

2. The class D-amplifier according to claim 1 wherein the class D-amplifier is formed fully differential.

3. The class D-amplifier according to claim 1 wherein the MOSFETs are formed in a CMOS process.

4. The class D-amplifier according to claim 1 wherein the comparator is supplied with a first supply voltage.

5. The class D-amplifier according to claim 1 wherein the driving unit is supplied with a separate second supply voltage.

6. The class D-amplifier according to claim 5 wherein the second supply voltage Is higher than the first supply voltage.

7. The class D-amplifier according to claim 1 wherein a phase control circuit is provided between the comparator and the driving unit to supply phase controlled complementary pulse width modulated signals to the gate terminals of the MOSFETs of the driving stages provided within the driving unit.

8. The class D-amplifier according to claim 7 wherein the drain-terminals of the complementary MOSFETs within the driving stages of the driving unit are connected to each other and to the signal output of said class D amplifier.

9. The class D-amplifier according to claim 8 wherein the drain-terminals of the complementary MOSFETs are extended from the gate controlled conducting channels of the MOSFETs, so that the breakdown voltage of the respective MOSFETs is high.

10. The class D-amplifier according to claim 1 wherein the comparator comprises a non inverting input connected to a first input terminal of the signal input of said class D-amplifier and an inverting input connected to a second input terminal of the signal input of said class D-amplifier.

11. The class D-amplifier according to claim 1 wherein the signal output of said class D-amplifier comprises a first output terminal connected to the drain terminals of the MOSFETs of a first driving stage and a second output terminal connected to the drain terminals of the MOSFETs of a second driving stage.

12. The class D-amplifier according to claim 11 wherein between the output terminals of the signal output a pair of first resistors and a first capacitor are provided.

13. The class D-amplifier according to claim 12 wherein a pair of second capacitors is provided which are connected in parallel to the first capacitor and a ground terminal.

14. The class D-amplifier according to claim 12 wherein the first output terminal is fedback via a first resistor and a second resistor to the inverting input of the comparator and the second output terminal is fedback via a first resistor and a second resistor to the non inverting input of the comparator.

15. The class D-amplifier according to claim 14 wherein the non inverting input and the inverting input of the comparator are connected via a pair of third resistors to a ground terminal.

16. The class D-amplifier according to claim 12 wherein the feedback circuit is formed by:

(a) the pair of first resistors,

(b) the first capacitor,

(c) the pair of second resistors,

(d) the pair of second capacitors, and

(e) the pair of third resistors.

17. The class D-amplifier according to claim 1 wherein the class D-amplifier is fully integrated.

18. The class D-amplifier according to claim 1 wherein the input signal is an xDSL signal.

19. The class D-amplifier according to claim 1 wherein the generated switch signal comprises a switching frequency which is higher than the highest frequency of the input signal.

20. The class D-amplifier according to claim 19 wherein the switching frequency of the switching signal generated by the feedback circuit depends on a first time constant as a product of the resistivity of a first resistor and the capacitance of a first capacitor and on a second time constant as a product of the resistivity of a second resistor and the capacitance of a second capacitor.

21. The class D-amplifier according to claim 20 wherein the switching frequency of the switch signal is adjustable.

22. The class D-amplifier according to claim 1 wherein the feedback circuit forms a self oscillating loop.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2020
From: LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: INTEL CORPORATION
Reel/Frame 053259/0678 →
MERGER AND CHANGE OF NAME Recorded Jan 17, 2018
From: LANTIQ DEUTSCHLAND GMBH; LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 045086/0015 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 025413/0340 AND 025406/0677 Recorded Apr 17, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 035453/0712 →
GRANT OF SECURITY INTEREST IN U.S. PATENTS Recorded Nov 29, 2010
From: LANTIQ DEUTSCHLAND GMBH
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 025406/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
To: LANTIQ DEUTSCHLAND GMBH
Reel/Frame 024529/0614 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2010
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
Reel/Frame 024474/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2005
From: BARKARO, KARL STEFAN; BOKINGE, BO; JOHANSSON, CAR-MIKAEL; KARLSSON, LARS; RANDAHL, TORBJOM; WIESBAUER, ANDREAS
To: INFINEON TECHNOLOGIES AG
Reel/Frame 016841/0906 →