On chip test mode implementation
View Patent ↗An improved on chip test method for determining the photon transfer curve (PTC) and dark current in an image sensor is described. Cost and time savings is achieved by reducing the number of frames necessary for the measurements to three including two exposure frames and one frame for dark current testing. A conventional test involving “n” different exposure times each with two frames is replaced by implementing a snap shot mode where a first plurality of pixel rows are exposed for a time t 1 , a second plurality of pixel rows are exposed for a time t 2 , and so forth up to an nth plurality of pixel rows exposed for a time t n where the total number of pixel rows equals a frame and t n >t 2 >t 1 . The resulting image has “n” regions each with a different brightness that become progressively brighter from top to bottom of the image.
1. An on-chip test method for photon transfer curve and dark current testing to determine pixel reliability in an image sensor device, comprising:
(a) providing a substrate and a sensor array having a plurality of pixels rows and columns formed thereon wherein each pixel is comprised of a charged photo gate at the base of a light column and a capacitor (storage node) for storing charge transferred from the photo gate, said substrate is linked to a tester device;
(b) exposing the sensor array with a uniform light source such that a first plurality of x 1 pixels in a first region are exposed for a time period t 1 in a first step, a second plurality of x 2 pixels in a second region are exposed for a time period t 2 in a second step, and so forth up to an nth plurality of x n pixels in an nth region exposed for a time period t n in an nth step wherein the total of x 1 +x 2 + . . . x n pixels equal a frame, and the time period becomes greater in successive steps such that t n >t 2 >t 1 ;
(c) transferring a residual charge in the photo gate to a capacitor for each pixel and subsequently sending residual charge information for each pixel to an image processor where an image for a first frame (F1) is generated, said image has a top and bottom and two sides;
(d) resetting the photo gate to the same charged state as in step (a);
(e) repeating steps (b)-(d) in succession to form an image having a top and bottom and two sides for a second frame (F2) in said image processor wherein illumination values for F1, F2, and (F2−F1) may be calculated and a difference frame (F2−F1) determined;
(f) resetting the photo gate to the same charged state as in step (a); and
(g) generating a third frame with no illumination to determine the dark current contribution by transferring the residual charge in the photo gate for each pixel in the first region after a time period t 1 , in the second region after a time period t 2 , and so forth up to the nth region after a time period t n .
2. The method of claim 1 wherein the exposure period t n for the nth plurality of pixels essentially saturates said nth plurality of pixels to produce a white region in said images for the F1 and F2 frames.
3. The method of claim 2 wherein the exposure period t 1 for the first plurality of pixels produces a substantially black region in said images for the F1 and F2 frames.
4. The method of claim 3 wherein the substantially black region is formed at the top of said images and the essentially white region is formed at the bottom of said images and the exposures having time periods between t 1 and t n produce successively brighter regions between the top and bottom of said images wherein the brightness increases as the time period increases in length.
5. The method of claim 1 wherein each of the “n” regions has the same number of pixels and x 1 =x 2 =x n .
6. The method of claim 1 wherein one or more of the values x 2 , . . . x n are unequal to the value x 1 .
7. The method of claim 1 wherein the time periods t 1 , t 2 , . . . t n are determined based on the resolution and speed of the sensor.
8. The method of claim 1 wherein sending residual charge information for each pixel to an image processor in step (c) occurs through a frame grabber component of the tester device.
9. The method of claim 1 wherein the exposures are performed in a rolling shutter mode.
10. The method of claim 1 wherein the exposures are performed in a snap shot mode.
11. An on-chip test method for photon transfer curve and dark current testing to determine pixel reliability in an image sensor device, comprising:
(a) providing a substrate and a sensor array having a plurality of pixels rows and columns formed thereon wherein each pixel is comprised of a charged photo gate at the base of a light column and a capacitor (storage node) for storing charge transferred from the photo gate, said substrate is linked to a tester device;
(b) exposing the sensor array with a uniform light source such that a first plurality of x 1 pixel rows are exposed for a time period t 1 in a first step, a second plurality of x 2 pixel rows are exposed for a time period t 2 in a second step, and so forth up to an nth plurality of x n pixel rows exposed for a time period t n in an nth step wherein x 1 -x n are integers and the total of x 1 +x 2 + . . . x n pixel rows equal a frame, and t n >t 2 >t 1 ;
(c) transferring a residual charge in the photo gate to the capacitor for each pixel and subsequently sending residual charge information for each pixel to an image processor where an image for a first frame (F1) is generated, said image has a top and bottom;
(d) resetting the photo gate to the same charged state as in step (a);
(e) repeating steps (b)-(d) in succession to form an image having a top and bottom for a second frame (F2) in said image processor wherein illumination values for F1, F2, and (F2−F1) may be calculated and a difference frame (F2−F1) determined;
(f) resetting the photo gate to the same charged state as in step (a); and
(g) generating a third frame with no illumination to determine the dark current contribution by transferring the residual charge in the photo gate for each pixel in the first plurality of pixel rows after a time period t 1 , in the second plurality of pixel rows after a time period t 2 , and so forth up to the nth plurality of pixel rows after a time period t n .
12. The method of claim 11 wherein the exposure period t n for the nth plurality of pixel rows essentially saturates said nth plurality of pixel rows to produce a white region in said images for the F1 and F2 frames.
13. The method of claim 12 wherein the exposure period t 1 for the first plurality of pixel rows produces a substantially black region in said images for the F1 and F2 frames.
14. The method of claim 13 wherein the substantially black region is formed at the top of said images and the essentially white region is formed at the bottom of said images and the exposures having time periods between t 1 and t n produce successively brighter regions between the top and bottom of said images wherein the brightness increases as the time period increases in length.
15. The method of claim 11 wherein the exposures are performed in a snap shot mode.
16. The method of claim 15 wherein a register in a process control unit is used to set the number of steps in the snap shot mode during exposure of the sensor area.
17. The method of claim 11 wherein the number of pixel rows exposed in each step are equivalent and x 1 =x 2 =x n .
18. The method of claim 11 wherein the time periods t 1 , t 2 , . . . t n are determined based on the resolution and speed of the sensor.
19. The method of claim 12 wherein sending residual charge information for each pixel to an image processor in step (c) occurs through a frame grabber component of the tester device.
20. The method of claim 11 wherein the exposures are performed in a rolling shutter mode.