Display substrate and method of manufacturing the same

1. A method of manufacturing a display substrate comprising:

depositing a gate metallic layer, a gate insulation layer and a channel layer, in sequence, on a base substrate;

forming a gate electrode of a switching device, a channel pattern on the gate electrode and a gate line by a first photoresist pattern;

depositing a transparent conductive layer on the base substrate having the channel pattern;

depositing a source metallic layer on the transparent conductive layer;

forming a source electrode, a drain electrode of the switching device, a pixel electrode electrically connected to the drain electrode and a source line by a second photoresist pattern;

forming a first protective insulation layer; and

removing the first protective insulation layer on the pixel electrode by a third photoresist pattern,

wherein forming the gate line comprises:

forming the first photoresist pattern including a first pattern of a first thickness in a gate electrode area and a second pattern of a second thickness in a gate line region on the base substrate having the channel layer;

etching the channel layer, the gate insulation layer, and the gate metallic layer in sequence by the first photoresist pattern as an etching mask;

selectively etching the channel layer in the gate line area by the first pattern as an etching mask; and

removing the first pattern to form the gate electrode and the channel pattern in the gate electrode area,

wherein selectively etching comprises:

removing the first photoresist pattern at a predetermined thickness to expose the channel layer in the gate line area and to leave a third pattern in the gate electrode area and

etching the channel in the gate line area by the third pattern.

2. The method of claim 1 , wherein forming the gate electrode and the channel pattern in the gate electrode area comprises:

forming a second protective insulation layer on the base substrate, where the channel layer in the gate line area is etched; and

removing the third pattern.

3. A method of manufacturing a display substrate comprising:

depositing a gate metallic layer, a gate insulation layer, and a channel layer in sequence on a base substrate;

forming a gate electrode of a switching device, a channel pattern on the gate electrode, and a gate line by a first photoresist pattern;

depositing a transparent conductive layer on the base substrate having the channel pattern;

depositing a source metallic layer on the transparent conductive layer;

forming a source electrode, a drain electrode of the switching device, a pixel electrode electrically connected to the drain electrode, and a source line by a second photoresist pattern;

forming a first protective insulation layer; and

removing the first protective insulation layer on the pixel electrode by a third photoresist pattern,

wherein forming the source line comprises:

forming the second photoresist pattern including a first pattern of a first thickness in the source electrode area, the drain electrode area and the source line area, and a second pattern of a second thickness in the pixel electrode area, on the base substrate;

etching the source metallic layer and the transparent conductive layer by the second photoresist pattern; and

selectively etching the source metallic layer in the pixel electrode area by the first pattern.

4. The method of claim 3 , wherein selectively etching comprises:

removing the second photoresist pattern at a predetermined thickness to expose the source metallic layer in the pixel electrode area and to leave a third pattern in the source and drain electrode areas; and

etching the source metallic layer in the pixel electrode area by the third pattern.

5. The method of claim 4 , wherein the transparent conductive layer comprises amorphous indium tin oxide.

6. The method of claim 4 , wherein the source metallic layer comprises a triple layered structure having a first molybdenum layer, an aluminum layer and a second molybdenum layer, in sequence.

7. The method of claim 4 , after etching the source metallic layer in the pixel electrode area, further comprising removing the third pattern.

8. The method of claim 3 , wherein the channel pattern comprises an active layer on the gate electrode and a resistant contact layer on the active layer, further comprising removing the resistant contact layer exposed by the second photoresist pattern.

9. The method of claim 1 , wherein removing the first protective insulation layer comprises:

forming the third photoresist pattern having an opening in the pixel electrode area on the base substrate having the first protective insulation; and

etching the first protective insulation layer in the pixel electrode area by the third photoresist pattern having the opening.

10. The method of claim 1 , wherein forming the gate line comprises forming a gate pad electrode at an end portion of the gate line.

11. The method of claim 10 , wherein removing the first protective insulation layer comprises forming a first hole exposing the gate pad electrode.

12. The method of claim 1 , wherein forming the source line comprises forming a source pad electrode at an end portion of the source line.

13. The method of claim 12 , wherein forming the first protective insulation layer comprises forming a second hole exposing the source pad electrode.