Solid-state imaging device and manufacturing method thereof
View Patent ↗A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
1. A method of manufacturing a solid-state imaging device including a photoelectric conversion unit and a transistor that constitute a pixel, and an element separation region formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor, the method comprising steps of:
forming a gate electrode of the transistor such that a part thereof protrudes outside beyond an active region of the transistor; and
ion implanting impurity for forming the element separation region using the gate electrode of the transistor as a part of a mask, wherein
the source region and the drain region of the transistor are formed such that impurity density is in a dose amount in a range from 1×10 14 cm −2 to 1×10 15 cm −2 .
2. A method of manufacturing a solid-state imaging device including a photoelectric conversion unit and a transistor that constitute a pixel, and an element separation region formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor, the method comprising steps of:
forming a gate electrode of the transistor such that a part thereof protrudes outside beyond an active region of the transistor; and
ion implanting impurity for forming the element separation region using the gate electrode of the transistor as a part of a mask, wherein
the element separation region is formed such that impurity density is in a dose amount 1×10 14 cm −2 or below.
3. A method of manufacturing a solid-state imaging device, the method comprising:
forming a transistor region having a channel region of a first conductivity between source and drain regions of a second conductivity, said channel region being within a well region of a substrate;
forming a element separation region having first and second semiconductor regions of the first conductivity, said first and second semiconductor regions being within said well region;
forming a photodiode within said well region, said second semiconductor region being between said first semiconductor region and said photodiode;
forming a gate insulating film between said well region and a gate electrode, said gate insulating film being in physical contact with said channel region and said first semiconductor region,
wherein a protrusion of the gate electrode extends in a channel width direction from a first portion of the gate insulating film almost to said second semiconductor region, a portion of the gate insulating film being between said first semiconductor region and said protrusion.
4. The method according to claim 3 , wherein a channel length of the channel region is between said source and drain regions, said channel width direction being perpendicular to said channel length.
5. The method according to claim 3 , wherein the conductivity type of the first conductivity is opposite to the conductivity type of the second conductivity.
6. The method according to claim 3 , wherein said well region is of the first conductivity.
7. The method according to claim 3 , wherein said source and drain regions are within said well region.
8. The method according to claim 3 , wherein said element separation region surrounds said transistor region, said transistor region being between a portion of said element separation region and said another portion of said element separation region.
9. The method according to claim 3 , wherein said channel region, said source region, and said drain region are in physical contact with said first semiconductor region.
10. The method according to claim 3 , wherein said first semiconductor region is between said second semiconductor region and said channel region.
11. The method according to claim 3 , wherein said photodiode includes an accumulation layer of the first conductivity and a charge accumulation region of the second conductivity, said accumulation layer being between said charge accumulation region and said gate insulating film.
12. The method according to claim 11 , wherein a portion of said accumulation layer extends into said second semiconductor region.
13. The method according to claim 3 , wherein said gate insulating film between said first semiconductor region and said protrusion is of a substantially same thickness as said gate insulating film between said channel region and said another portion.
14. The method according to claim 3 , wherein said second semiconductor region has an impurity density.
15. The method according to claim 14 , wherein said impurity density is the same as an impurity density of said first semiconductor region.
16. The method according to claim 14 , wherein said impurity density is greater than an impurity density of said first semiconductor region.
17. The method according to claim 14 , wherein said impurity density is the same as an impurity density of said well region.