IP Library Granted Patent US 8,071,474
Granted Patent B2
US 8,071,474 · App. 12/853,676 · Granted Dec 6, 2011

Method of manufacturing semiconductor device suitable for forming wiring using damascene method

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Quick Facts
Patent No.
US 8,071,474
App. No.
12/853,676
Granted
Dec 6, 2011
Kind
B2
Abstract

(a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.

Claims (16)

1. A semiconductor device manufacture method comprising:

(b1) forming a concave portion in an interlayer insulating film formed on a semiconductor substrate;

(b2) forming a first film containing Cu and Mn by CVD, the first film covering an inner surface of the concave portion and an upper surface of the insulating film;

(b2-1) forming a second film of Cu on the first film by sputtering;

(b3) depositing conductive material essentially consisting of Cu on the second film to embed the conductive material in the concave portion; and

(b4) annealing the semiconductor substrate.

2. The semiconductor device manufacture method according to claim 1 , wherein in the step (b2), the first film is formed by supplying Cu source material and Mn source material at the same time.

3. The semiconductor device manufacture method according to claim 1 , wherein in the step (b2), the first film is formed by supplying Cu source material and Mn source material alternately.

4. The semiconductor device manufacture method according to claim 1 , wherein in the step (b3), the conductive material is embedded in the concave portion by electroplating the conductive material using the second film as an electrode.

5. The semiconductor device manufacture method according to claim 1 , wherein in the step (b3), comprises:

the conductive material essentially consisting of Cu is deposited by electroplating by using the second film as an electrode.

6. A semiconductor device manufacture method comprising:

depositing an alloy film containing Cu and Mn on an insulating film by CVD while Mn source material and Cu source material are supplied at the same time; and

forming a Cu film on the alloy film by sputtering.

7. The semiconductor device manufacture method according to claim 6 ,

wherein bismethylcyclopentadienyl manganese or bisisopropylcyclopentadienyl manganese is used as the Mn source material.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →