IP Library Granted Patent US 8,076,710
Granted Patent B2
US 8,076,710 · App. 12/542,274 · Granted Dec 13, 2011

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 8,076,710
App. No.
12/542,274
Granted
Dec 13, 2011
Kind
B2
Abstract

A method for manufacturing a semiconductor device is provided. The method includes forming multiple conductive patterns 13 a , forming an intermediate insulating film 16 on all of device isolation insulating films 6 and the conductive patterns 13 a , forming a second conductive film 17 on the intermediate insulating film 16 , patterning the second conductive film 17 , the intermediate insulating film 16 , and the multiple conductive patterns 13 a , individually, to make the conductive patterns 13 a into floating gates 13 c and to make the second conductive film 17 into multiple strip-like control gates 17 a . In the method, an edge, in a plan layout, of at least one of each of the conductive patterns 13 a and each of the device isolation insulating films 6 is bent in a region between the control gates 17 a adjacent in a row direction.

Claims (62)

1. A semiconductor device comprising:

a semiconductor substrate;

device isolation insulating films formed in the semiconductor substrate and extending in a row direction;

a tunnel insulating film formed over the semiconductor device between the device isolation insulating films;

a plurality of floating gates formed in a matrix form over the tunnel insulating film;

an intermediate insulating film formed over the floating gates; and

a plurality of strip-shaped control gates that are respectively formed over the intermediate insulating films and that respectively extend in a column direction, the control gate collectively covering the plurality of the floating gates aligned in a single column, wherein

a residue of the intermediate insulating film is formed to linearly extend over the device isolation insulating film or over the tunnel insulating film in a region between the control gates adjacent in the row direction,

and a portion of the residue is located out of a slanting surface of the device isolation insulating film, and

wherein the residue extends to bend toward an inner side in the column direction of the device isolation insulating film in a plan view, and

the portion of the residue is formed over a top surface of the device isolation insulating film.

2. A semiconductor device comprising:

a semiconductor substrate;

device isolation insulating films formed in the semiconductor substrate and extending in a row direction;

a tunnel insulating film formed over the semiconductor device between the device isolation insulating films;

a plurality of floating gates formed in a matrix form over the tunnel insulating film;

an intermediate insulating film formed over the floating gates; and

a plurality of strip-shaped control gates that are respectively formed over the intermediate insulating films and that respectively extend in a column direction, the control gate collectively covering the plurality of the floating gates aligned in a single column, wherein

a residue of the intermediate insulating film is formed to linearly extend over the device isolation insulating film or over the tunnel insulating film in a region between the control gates adjacent in the row direction,

and a portion of the residue is located out of a slanting surface of the device isolation insulating film, and

wherein the residue extends to bend toward an outer side in the column direction of the device isolation insulating film in a plan view, and

the portion of the residue is formed over the tunnel insulating film in the region between the control gates adjacent in the row direction.

3. A semiconductor device comprising:

a semiconductor substrate;

device isolation insulating films formed in the semiconductor substrate and extending in a row direction;

a tunnel insulating film formed over the semiconductor device between the device isolation insulating films;

a plurality of floating gates formed in a matrix form over the tunnel insulating film;

an intermediate insulating film formed over the floating gates; and

a plurality of strip-shaped control gates that are respectively formed over the intermediate insulating films and that respectively extend in a column direction, the control gate collectively covering the plurality of the floating gates aligned in a single column, wherein

a residue of the intermediate insulating film is formed to linearly extend over the device isolation insulating film or over the tunnel insulating film in a region between the control gates adjacent in the row direction,

and a portion of the residue is located out of a slanting surface of the device isolation insulating film, and

wherein the device isolation insulating film has a concave portion in the region between the control gates adjacent in the row direction, the concave portion being recessed toward an inner side in the column direction of the device isolation insulating film in a plan view, and

the portion of the residue is formed either over the tunnel insulating film beside the concave portion or over a top surface of the device isolation insulating film.

4. A semiconductor device comprising:

a semiconductor substrate;

device isolation insulating films formed in the semiconductor substrate and extending in a row direction;

a tunnel insulating film formed over the semiconductor device between the device isolation insulating films;

a plurality of floating gates formed in a matrix form over the tunnel insulating film;

an intermediate insulating film formed over the floating gates; and

a plurality of strip-shaped control gates that are respectively formed over the intermediate insulating films and that respectively extend in a column direction, the control gate collectively covering the plurality of the floating gates aligned in a single column, wherein

a residue of the intermediate insulating film is formed to linearly extend over the device isolation insulating film or over the tunnel insulating film in a region between the control gates adjacent in the row direction,

and a portion of the residue is located out of a slanting surface of the device isolation insulating film, and

wherein the device isolation insulating film has a convex portion in the region between the control gates adjacent in the row direction, the convex portion protruding toward an outer side in the column direction of the device isolation insulating film in a plan view, and

the portion of the residue is formed over a top surface of the device isolation insulating film.

5. The semiconductor device according to claim 3 , wherein the residue is linearly formed.

6. The semiconductor device according to claim 1 , wherein the residue extends from the floating gate to the other floating gate, the floating gates being adjacent in the row direction.

7. The semiconductor device according to claim 1 , wherein no stringers made of a same material as that of the floating gates exist beside the portion of the residue of the intermediate insulating film.

8. The semiconductor device according to claim 1 , wherein the intermediate insulating film is any one of the group consisting of a silicon oxide film, an ONO film, and an ONONO film.

9. The semiconductor device according to claim 1 , wherein the device isolation insulating film is formed of a field oxide film.

10. The semiconductor device according to claim 4 , wherein the residue is linearly formed.

11. The semiconductor device according to claim 2 , wherein the residue extends from the floating gate to the other floating gate, the floating gates being adjacent in the row direction.

12. The semiconductor device according to claim 2 , wherein no stringers made of a same material as that of the floating gates exist beside the portion of the residue of the intermediate insulating film.

13. The semiconductor device according to claim 2 , wherein the intermediate insulating film is any one of the group consisting of a silicon oxide film, an ONO film, and an ONONO film.

14. The semiconductor device according to claim 2 , wherein the device isolation insulating film is formed of a field oxide film.

15. The semiconductor device according to claim 3 , wherein the residue extends from the floating gate to the other floating gate, the floating gates being adjacent in the row direction.

16. The semiconductor device according to claim 3 , wherein no stringers made of a same material as that of the floating gates exist beside the portion of the residue of the intermediate insulating film.

17. The semiconductor device according to claim 3 , wherein the intermediate insulating film is any one of the group consisting of a silicon oxide film, an ONO film, and an ONONO film.

18. The semiconductor device according to claim 3 , wherein the device isolation insulating film is formed of a field oxide film.

19. The semiconductor device according to claim 4 , wherein the residue extends from the floating gate to the other floating gate, the floating gates being adjacent in the row direction.

20. The semiconductor device according to claim 4 , wherein no stringers made of a same material as that of the floating gates exist beside the portion of the residue of the intermediate insulating film.

21. The semiconductor device according to claim 4 , wherein the intermediate insulating film is any one of the group consisting of a silicon oxide film, an ONO film, and an ONONO film.

22. The semiconductor device according to claim 4 , wherein the device isolation insulating film is formed of a field oxide film.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2009
From: SUGAWARA, HIROKI
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 023116/0130 →