IMS formed as can for semiconductor housing
View Patent ↗An insulated metal substrate composite has a patterned conductive layer on one surface and receives one or more electrodes of MOSFETs or other die on the patterned segments which lead to the edge of the IMS. The outer periphery of the IMS is cupped or bent to form a shallow can with two or more die fixed to and thermally coupled to the flat web of the can while electrodes on the die surfaces thermally coupled to the web of the can lead to terminals on the rim of the can which are coplanar with the bottom surfaces of the die. The electrodes can be externally or internally connected to form a half bridge circuit.
1. A package for copacking at least two semiconductor dies which each have parallel first and second surfaces and respective solderable first and second electrodes on said first and second surfaces; said package comprising:
a composite structure including a relatively thick electrically conductive metallic layer, a relatively thin electrically conductive patterned layer having at least first and second spaced segments, and a thin electrically insulating dielectric layer which bonds one surface of said patterned layer to one surface of said metallic layer, wherein peripheral edges of said composite structure include a rim which is downwardly bent in a direction perpendicular to a remaining flat central web thereof to define a flat cup shape;
said first electrodes of said at least two semiconductor dies being electrically connected to said first and second spaced segments;
said second electrodes of said at least two semiconductor dies being substantially coplanar;
said first and second spaced segments extending to opposite edges of said composite structure to define first and second terminals of said package;
said second electrodes defining at least third and fourth terminals for said package;
said at least two semiconductor dies being closely thermally coupled to said metallic layer through said dielectric layer.
2. The package of claim 1 , wherein said first and second terminals are disposed on the flat central web and at least said first terminals are dispensed on said downwardly bent rim and are generally planar with said at least third and fourth terminals.
3. The package of claim 2 , wherein said composite structure is an insulated metal substrate (IMS).
4. The package of claim 2 , wherein at least one of said semiconductor dies is a MOSgated semiconductor die.
5. The package of claim 2 , wherein at least one of said semiconductor dies is an integrated circuit for the control of at least one other semiconductor die.
6. The package of claim 2 , wherein said semiconductor dies are MOSFETs and wherein said first and second electrodes are source and drain electrodes respectively; the source of one semiconductor die being connectable to the drain of one other semiconductor die to define a half bridge circuit.
7. The package of claim 1 , wherein one of said semiconductor dies has a third electrode which is coplanar with its first electrode, and wherein said patterned layer has a third segment spaced from said first and second segments; said third electrode being electrically connected to said third segment; said third segment extending to said rim of said composite structure and being coplanar with said first and second terminals.
8. The package of claim 7 , wherein said composite structure is an insulated metal substrate (IMS).
9. The package of claim 7 , wherein at least one of said semiconductor dies is a MOSgated semiconductor die.
10. The package of claim 7 , wherein at least one of said semiconductor dies is an integrated circuit for the control of at least one other semiconductor die.
11. The package of claim 7 , wherein said semiconductor dies are MOSFETs and wherein said first and second electrodes are source and drain electrodes respectively; the source of one semiconductor die being connectable to the drain of one other semiconductor die to define a half bridge circuit.
12. The package of claim 7 , wherein said third electrode is a gate electrode.
13. The package of claim 1 , wherein said composite structure is an insulated metal substrate (IMS).
14. The package of claim 13 , wherein at least one of said semiconductor dies is an integrated circuit for the control of at least one other semiconductor die.
15. The package of claim 1 , wherein at least one of said semiconductor dies is a MOSgated semiconductor die.
16. The package of claim 1 , wherein at least one of said semiconductor dies is an integrated circuit for the control of at least one other semiconductor die.
17. The package of claim 1 , wherein said semiconductor dies are MOSFETs and wherein said first and second electrodes are source and drain electrodes respectively; the source of one semiconductor die being connectable to the drain of one other semiconductor die to define a half bridge circuit.
18. A package for copacking at least two semiconductor dies, said package comprising:
a composite structure including a relatively thick electrically conductive metallic layer, a relatively thin electrically conductive patterned layer having at least first and second spaced segments, and a thin electrically insulating dielectric layer which bonds one surface of said patterned layer to one surface of said metallic layer, wherein peripheral edges of said composite structure include a rim which is downwardly bent in a direction perpendicular to a remaining flat central web thereof to define a flat cup shape;
said first and second spaced segments extending to opposite edges of said composite structure to define first and second terminals of said package; and
third and fourth terminals of said package disposed on said first and second semiconductor dies, respectively, and being coplanar with said rim of said composite structure;
said at least two semiconductor dies being closely thermally coupled to said metallic layer through said dielectric layer.
19. The package of claim 18 , wherein said first and second terminals are disposed on the flat central web and at least said first terminal is dispensed on said downwardly bent rim and is generally planar with said third and fourth terminals.
20. The package of claim 18 , wherein one of said semiconductor dies has coplanar first and second electrodes, and wherein said patterned layer has a third segment spaced from said first and second segments; one of said first and second electrodes being electrically connected to said third segment; said third segment extending to said rim of said composite structure and being coplanar with said first and second terminals.