EFTB unit, USB device with the EFTB unit and method for resetting and reenumerating the USB device
View Patent ↗A method for resetting and reenumerating a Universal Serial Bus (USB) device, an Electrical Fast Transient/Burst (EFTB) unit of a USB device for resetting and reenumerating the USB device and a USB device are described. In one embodiment, a method for resetting and reenumerating a USB device involves detecting a USB reset command from a host device at a USB device, setting a reset flag in the USB device in response to the detecting of the USB reset command, determining if the USB device is in a corrupted state in response to the reset flag, and causing a Single Ended Zero (SE0) signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state. Other embodiments are also described.
1. A method for resetting and reenumerating a Universal Serial Bus (USB) device, the method comprising:
detecting a USB reset command from a host device at a USB device;
setting a reset flag in the USB device in response to the detecting;
determining if the USB device is in a corrupted state in response to the reset flag; and
causing a Single Ended Zero (SE0) signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state.
2. The method of claim 1 , wherein detecting the USB reset command and setting the reset flag are performed by an analog circuit.
3. The method of claim 2 , wherein determining if the USB device is in the corrupted state and causing the SE0 signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state are performed by a digital circuit.
4. The method of claim 3 , wherein detecting the USB reset command comprises receiving from the host device an SE0 signal whose signal duration is more than a threshold time duration.
5. The method of claim 3 , wherein determining if the USB device is in the corrupted state comprises inspecting two logical signals generated by the USB device in response to signals from the host device.
6. The method of claim 3 , wherein causing the SE0 signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state comprises resetting digital blocks of the USB device out of any corrupted state in response to the SE0 signal.
7. An Electrical Fast Transient/Burst (EFTB) unit of a Universal Serial Bus (USB) device for resetting the USB device, the EFTB unit comprising:
an analog reset detector configured to detect a USB reset command from a host device and to set a reset flag in response to the detection of the USB reset command; and
a digital EFTB controller configured to determine if the USB device is in a corrupted state in response to the reset flag and to cause a Single Ended Zero (SE0) signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state.
8. The EFTB unit of claim 7 , wherein the digital EFTB controller is further configured to inspect two logical signals that are generated by the USB device in response to signals from the host device to determine if the USB device is in the corrupted state.
9. The EFTB unit of claim 7 , wherein the analog reset detector is further configured to detect the USB reset command if the analog reset detector receives from the host device an SE0 signal whose signal duration is more than a threshold time duration.
10. The EFTB unit of claim 7 , wherein the analog reset detector is further configured to use a capacitor discharge mechanism to detect the USB reset command from the host device.
11. The EFTB unit of claim 10 , wherein the analog reset detector comprises:
a NOR logic circuit configured to receive signals from the host device via Input/Output (IO) pads contained in a padframe of the USB device;
an inverter connected to the NOR logic circuit;
a first switch connected to the inverter and a first voltage source;
a second switch connected to the first switch and a current source;
a capacitor connected to the first switch and the second switch;
a comparator connected to the capacitor and a second voltage source, wherein the comparator is configured to generate the reset flag; and
a latch connected to the comparator and configured to store the reset flag.
12. The EFTB unit of claim 11 , wherein a voltage level of the first voltage source is higher than the voltage level of the second voltage source.
13. The EFTB unit of claim 7 further comprising two buffers configured to connect the analog reset detector to the host device to receive signals from the host device via Input/Output (IO) pads contained in a padframe of the USB device.
14. A Universal Serial Bus (USB) device comprising:
a padframe containing Input/Output (IO) pads;
a USB device controller configured to transmit signals to a host device via the IO pads and to generate USB status signals based on signals that are received from the host device via the IO pads;
an Electrical Fast Transient/Burst (EFTB) unit comprising:
an analog reset detector configured to detect a USB reset command from the host device and to set a reset flag in response to the detection of the USB reset command; and
a digital EFTB controller configured to determine if the USB device is in a corrupted state in response to the reset flag and the USB status signals and to cause a Single Ended Zero (SE0) signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state;
an IO controller coupled to the USB device controller, the IO pads and the EFTB unit; and
a reset controller configured to reset the USB device globally and out of the corrupted state in response to the SE0 signal.
15. The USB device of claim 14 further comprising:
an image sensor array configured to obtain image information; and
a processor coupled to the image sensor array and the USB device controller and configured to process the image information to generate navigation signals.
16. The USB device of claim 14 , wherein the digital EFTB controller is further configured to inspect two logical signals that are generated by the USB device in response to signals from the host device to determine if the USB device is in the corrupted state.
17. The USB device of claim 14 , wherein the analog reset detector is further configured to detect the USB reset command if the analog reset detector receives from the host device an SE0 signal whose signal duration is more than a threshold time duration.
18. The USB device of claim 14 , wherein the analog reset detector is further configured to use a capacitor discharge mechanism to detect the USB reset command from the host device.
19. The USB device of claim 18 , wherein the analog reset detector comprises:
a NOR logic circuit configured to receive signals from the host device via the IO pads contained in the padframe;
an inverter connected to the NOR logic circuit;
a first switch connected to the inverter and a first voltage source;
a second switch connected to the first switch and a current source;
a capacitor connected to the first switch and the second switch;
a comparator connected to the capacitor and a second voltage source, wherein the comparator is configured to generate the reset flag, and wherein a voltage level of the first voltage source is higher than the voltage level of the second voltage source; and
a latch connected to the comparator and configured to store the reset flag.
20. The USB device of claim 14 , wherein the EFTB unit further comprises two buffers configured to connect the analog reset detector to the host device to receive signals from the host device via the IO pads contained in the padframe.