IP Library Granted Patent US 8,548,097
Granted Patent B1
US 8,548,097 · App. 13/755,028 · Granted Oct 1, 2013

Coarse phase estimation for highly-spectrally-efficient communications

Inventor: Amir Eliaz (Moshav Ben Shemen, IL)
Assignee: MagnaCom Ltd.
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Quick Facts
Patent No.
US 8,548,097
App. No.
13/755,028
Granted
Oct 1, 2013
Kind
B1
Abstract

Methods and systems are provided for coarse phase estimation for highly-spectrally efficient communications. An example method may include, equalizing, in a receiver, a received inter-symbol correlated (ISC) signal to generate an equalized ISC signal. A phase adjustment signal may be generated based on an ISC feedback signal. The ISC feedback signal may be generated using a sequence estimation process and a non-linearity function. A phase of the equalized ISC signal may be adjusted using the generated phase adjustment signal, to generate a phase adjusted partial response signal. The phase adjustment signal may be generated based on a phase difference between the equalized ISC signal and the partial response feedback signal. At least one ISC vector may be generated by buffering samples of the phase adjusted ISC signal.

Claims (44)

1. A method, comprising: in a receiver: equalizing a received inter-symbol correlated (ISC) signal to generate an equalized ISC signal;

generating a phase adjustment signal based on an ISC feedback signal, said ISC feedback signal generated using a sequence estimation process and a non-linearity function;

adjusting a phase of said equalized ISC signal using said generated phase adjustment signal, to generate a phase adjusted ISC signal; and

generating at least one ISC vector by buffering samples of said phase adjusted ISC signal, wherein said sequence estimation process comprises:

generating a sequence of estimated symbols based on said at least one ISC vector; convolving said sequence of estimated symbols with at least one tap coefficient to generate a convolved ISC signal; and

generating said ISC feedback signal by applying said non-linearity function to said convolved ISC signal.

2. The method according to claim 1 , comprising:

generating said phase adjustment signal based on a phase difference between said equalized ISC signal and said ISC feedback signal.

3. The method according to claim 1 , wherein said at least one tap coefficient comprises at least one tap coefficient of a filter.

4. The method according to claim 1 , wherein said generating of said phase adjustment signal comprises:

generating a phase error signal corresponding to a phase difference between a rotated version of said ISC feedback signal and said equalized ISC signal.

5. The method according to claim 4 , comprising:

rotating said ISC feedback signal based on said phase error signal, to generate said rotated version of said ISC feedback signal.

6. The method according to claim 4 , comprising:

filtering using at least one feedback loop, said phase error signal to generate said phase adjustment signal.

7. The method according to claim 6 , comprising:

dynamically adjusting parameters that control bandwidth and/or gain of said at least one feedback loop.

8. The method according to claim 1 , wherein the received ISC signal is a partial response signal generated via a partial response filter.

9. A system, comprising:

circuitry that includes an equalization circuit, a phase adjustment circuit, a sequence estimation circuit, a non-linearity modeling circuit, and a carrier recovery circuit, wherein:

said circuitry is operable to equalize a received inter-symbol correlated (ISC) signal to generate an equalized ISC signal;

said circuitry is operable to generate a phase adjustment signal based on an ISC feedback signal, said ISC feedback signal generated using a sequence estimation process and a non-linearity function;

said circuitry is operable to adjust a phase of said equalized ISC signal using said generated phase adjustment signal, to generate a phase adjusted ISC signal; and

said circuitry is operable to generate at least one ISC vector by buffering samples of said phase adjusted ISC signal, wherein during said sequence estimation process, said circuitry is operable to:

generate a sequence of estimated symbols based on said at least one ISC vector; and

convolve said sequence of estimated symbols with at least one tap coefficient to generate a convolved ISC signal.

10. The system according to claim 9 , wherein said circuitry is operable to generate said phase adjustment signal based on a phase difference between said equalized ISC signal and said ISC feedback signal.

11. The system according to claim 9 , wherein said at least one tap coefficient comprises at least one tap coefficient of a filter.

12. The system according to claim 9 , wherein said circuitry is operable to generate said ISC feedback signal by applying said non-linearity function to said convolved ISC signal.

13. The system according to claim 9 , wherein during said generating of said phase adjustment signal, said circuitry is operable to generate a phase error signal corresponding to a phase difference between a rotated version of said ISC feedback signal and said equalized ISC signal.

14. The system according to claim 13 , wherein said circuitry is operable to rotate said ISC feedback signal based on said phase error signal, to generate said rotated version of said ISC feedback signal.

15. The system according to claim 13 , wherein the received ISC signal is a partial response signal generated via a partial response filter.

16. A receiver, comprising:

a sequence estimation circuit that operates to generate a convolved inter-symbol correlated (ISC) signal based on a sequence estimation process that comprises:

generation of a sequence of estimated symbols based on at least one ISC vector generated by buffering samples of a phase adjusted ISC signal; and

convolution of said sequence of estimated symbols with at least one tap coefficient to generate said convolved ISC signal;

a non-linearity modeling circuit that operates to generate an ISC feedback signal by applying a non-linearity function to said convolved ISC signal; and

a carrier recovery circuit that operates based on said ISC feedback signal.

17. The receiver of claim 16 , comprising:

an equalizer; and

a phase adjustment circuit, wherein:

an output of said equalizer circuit is input to said carrier recovery circuit and to said phase adjustment circuit;

an output of said carrier recovery circuit is input to said phase adjustment circuit; and

an output of said phase adjustment circuit is a phase adjusted version of said output of said equalizer circuit.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: MAGNACOM LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041604/0861 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2013
From: ELIAZ, AMIR
To: MAGNACOM LTD.
Reel/Frame 030038/0636 →
Continuity (4)
Provisional Application 61662085 · Jun 20, 2012
Provisional Application 61726099 · Nov 14, 2012
Provisional Application 61729774 · Nov 26, 2012
Provisional Application 61747132 · Dec 28, 2012