IP Library Granted Patent US 8,856,415
Granted Patent B2
US 8,856,415 · App. 13/363,630 · Granted Oct 7, 2014

Bus arbitration for a real-time computer system

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Quick Facts
Patent No.
US 8,856,415
App. No.
13/363,630
Granted
Oct 7, 2014
Kind
B2
Abstract

In a real-time application, one or more computational tasks execute according to a time schedule and use input data from input devices and/or output data from output devices. One or more of the input devices or output devices may be unscheduled devices that attempt to access the peripheral bus at unscheduled times. Such unscheduled bus access can cause the time schedule to become comprised. Various methods for arbitrating access to the bus to better integrate the bus access with the time schedule followed by the application are described.

Claims (43)

1. A method comprising:

executing one or more software tasks statically scheduled according to a static time schedule, wherein the static time schedule defines specific execution start and end times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule; and

controlling access by the one or more unscheduled devices to the bus by turning on bus access for the one or more unscheduled devices at each respective execution start time for each of the one or more software tasks, and turning off the bus access for the one or more unscheduled devices each time the one or more software tasks complete execution per the static time schedule.

2. The method of claim 1 ,

wherein access to the bus is controlled by a switch, wherein turning on the bus access for the one or more unscheduled devices comprises calling a programming interface of the switch to cause the switch to turn on bus access for the one or more unscheduled devices.

3. The method of claim 1 , further comprising:

prior to executing the one or more software tasks, turning off the bus access for the one or more unscheduled devices.

4. The method of claim 1 , further comprising:

turning on bus access for one or more scheduled devices that access the bus at times defined by the static time schedule, wherein the bus access for the one or more scheduled devices remains turned on without being turned off.

5. The method of claim 1 , further comprising:

receiving a request by a first unscheduled device to access the bus at a particular time when the bus access for the one or more unscheduled devices is turned off; and

in response to determining that the bus access for the one or more unscheduled devices is turned off at the particular time, preventing the first unscheduled device from accessing the bus at the particular time.

6. The method of claim 1 ,

wherein executing the one or more software tasks comprises executing the one or more software tasks on one or more processors.

7. The method of claim 1 ,

wherein executing the one or more software tasks comprises executing the one or more software tasks on one or more programmable hardware elements.

8. A non-transitory computer-readable memory medium storing program instructions executable by one or more processors to:

execute one or more software tasks statically scheduled according to a static time schedule, wherein the static time schedule defines specific execution start and end times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule; and

control access by the one or more unscheduled devices to the bus by turning on bus access for the one or more unscheduled devices at each respective execution start time for each of the one or more software tasks, and turning off the bus access for the one or more unscheduled devices each time the one or more software tasks complete execution.

9. The non-transitory computer-readable memory medium of claim 8 ,

wherein access to the bus is controlled by a switch, wherein turning on the bus access for the one or more unscheduled devices comprises calling a programming interface of the switch to cause the switch to turn on bus access for the one or more unscheduled devices.

10. A method comprising:

executing one or more software tasks statically scheduled according to a static time schedule, wherein the static time schedule defines specific execution start and end times for the one or more software tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule;

wherein the static time schedule defines specific times for bus access for the one or more unscheduled devices to be turned on and specific times for bus access for the one or more unscheduled devices to be turned off, wherein the method further comprises turning on and off the bus access for the one or more unscheduled devices at the specific times defined by the static time schedule.

11. The method of claim 10 ,

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be turned on at each of the execution start times for the one or more tasks.

12. The method of claim 11 ,

wherein the static time schedule also defines specific execution completion times for the one or more software tasks; and

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be turned off at each of the execution completion times for the one or more software tasks.

13. The method of claim 11 ,

wherein in addition to the execution start times for the one or more software tasks, the static time schedule also specifies that bus access for the one or more unscheduled devices should be turned on at one or more other specific times.

14. The method of claim 10 , further comprising:

creating the static time schedule in response to user input, wherein creating the static time schedule comprises receiving user input specifying the specific times for the bus access for the one or more unscheduled devices to be turned on and off

15. The method of claim 14 ,

wherein the static time schedule is divided into time periods; and

wherein receiving the user input specifying the specific times for the bus access for the one or more unscheduled devices to be turned on and off comprises:

receiving user input specifying one or more time offsets indicating when the bus access for the one or more unscheduled devices should be turned on relative to a beginning of a time period;

for each of the time offsets, receiving user input specifying a length of time for the bus access for the one or more unscheduled devices to remain turned on.

16. A non-transitory computer-readable memory medium storing program instructions executable by one or more processors to:

execute one or more software tasks statically scheduled according to a static time schedule, wherein the static time schedule defines specific execution start and end times for the one or more tasks, wherein one or more unscheduled devices attempt to access a bus at times not defined by the static time schedule;

wherein the time schedule defines specific times for bus access for the one or more unscheduled devices to be turned on and specific times for bus access for the one or more unscheduled devices to be turned off, wherein the program instructions are further executable by one or more processors to turn on and off the bus access for the one or more unscheduled devices at the specific times defined by the static time schedule.

17. The non-transitory computer-readable memory medium of claim 16 ,

wherein the static time schedule specifies that bus access for the one or more unscheduled devices should be turned on at each of the execution start times for the one or more software tasks.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2012
From: CHANDHOKE, SUNDEEP
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 027632/0694 →