Semiconductor devices and methods for forming the same
A semiconductor device and a method for forming the same are provided. The semiconductor device includes a substrate having a first conductive type and an epitaxial layer having the first conductive type disposed over the substrate, wherein a trench is formed in the epitaxial layer. The semiconductor device also includes a polysilicon layer having the first conductive type disposed in the trench. The semiconductor device further includes a doped region having a second conductive type disposed along a sidewall and a bottom of the trench in the epitaxial layer, wherein a thickness along the sidewall and the bottom of the trench is uniform, and wherein the thickness is a vertical distance between the outermost side of the trench to the sidewall or the bottom of the trench.
1. A semiconductor device, comprising:
a substrate having a first conductive type;
an epitaxial layer having the first conductive type disposed over the substrate, wherein a trench is formed in the epitaxial layer;
a polysilicon layer having the first conductive type disposed in the trench; and
a doped region having a second conductive type disposed in the epitaxial layer along a sidewall and a bottom of the trench, wherein a thickness of the doped region along the sidewall and the bottom of the trench is uniform, and wherein the thickness is a vertical distance between an outermost side of the doped region to the sidewall and the bottom of the trench.
2. The semiconductor device as claimed in claim 1 , further comprising:
a well region having the second conductive type disposed on two sides of the doped region over the epitaxial layer; and
a heavily doped region having the first conductive type disposed over the well region.
3. The semiconductor device as claimed in claim 2 , wherein the polysilicon layer is a gate of the semiconductor device, the well region is a channel region of the semiconductor device, the heavily doped region is a source of the semiconductor device, and the substrate is a drain of the semiconductor device.
4. The semiconductor device as claimed in claim 1 , wherein a doping concentration of the doped region along the sidewall and the bottom of the trench is uniform.
5. The semiconductor device as claimed in claim 1 , wherein an aspect ratio of the trench is between 1 and 4.
6. The semiconductor device as claimed in claim 1 , wherein the first conductive type is n-type, and the doped region has a dopant comprising boron, boron containing compound or a combination thereof.
7. The semiconductor device as claimed in claim 6 , wherein the doping concentration of the doped region is in a range between 10 19 and 10 21 cm −3 .
8. The semiconductor device as claimed in claim 1 , wherein the first conductive type is p-type, and the doped region has a dopant comprising phosphorus, phosphorus containing compound or a combination thereof.
9. The semiconductor device as claimed in claim 8 , wherein the doping concentration of the doped region is in a range between 10 19 -10 21 cm −3 .
10. The semiconductor device as claimed in claim 2 , further comprising:
a reduced surface field doped region having the second conductive type disposed in the epitaxial layer and in the well region, wherein the reduced surface field doped region is separated from the trench.
11. A method for forming a semiconductor device, comprising:
providing a substrate having a first conductive type;
forming an epitaxial layer having the first conductive type over the substrate;
forming a trench in the epitaxial layer;
forming a doped region having a second conductive type in the epitaxial layer through the trench by a thermal diffusion process, wherein the doped region is extended along a sidewall and a bottom of the trench, and a thickness of the doped region along the sidewall and the bottom of the trench is uniform, and wherein the thickness of the doped region is a vertical distance between an outermost side of the doped region to the sidewall and the bottom of the trench; and
filling a polysilicon layer having the first conductive type in the trench.
12. The method as claimed in claim 11 , wherein a doping concentration of the doped region along the sidewall and the bottom of the trench is uniform.
13. The method as claimed in claim 11 , wherein the doped region comprises a first portion and a second portion on two opposite sidewalls of the trench respectively, and a third portion under the bottom of the trench, and wherein the first portion, the second portion and the third portion are formed simultaneously.
14. The method as claimed in claim 11 , wherein the first conductive type is n-type, and forming the doped region comprises using a gas of boron containing compound during the thermal diffusion process.
15. The method as claimed in claim 14 , wherein the gas of boron containing compound comprises boron tribromide or diborane.
16. The method as claimed in claim 11 , wherein the first conductive type is p-type, and forming the doped region comprises using a gas of phosphorus containing compound during the thermal diffusion process.
17. The method as claimed in claim 16 , wherein the gas of phosphorus containing compound comprises trichloride.
18. The method as claimed in claim 11 , further comprising:
forming a mask layer over the epitaxial layer before forming the doped region and after forming the trench, wherein the mask layer has an opening corresponding to the trench.
19. The method as claimed in claim 18 , wherein the mask layer comprises silicon nitride.
20. The method as claimed in claim 11 , further comprising:
forming a well region having the second conductive type over the epitaxial layer, and surrounding the trench after forming the doped region; and
forming a heavily doped region having the first conductive type over the well region.