Method of splitting register live ranges

1. A method of splitting live register ranges, the method comprising:

identifying one or more H pathways comprising one or more H nodes of a plurality of nodes, wherein at least one of the one or more H nodes has a high register pressure;

identifying an L pathway consisting of two or more L nodes of the plurality of nodes, the L pathway having an entry node and exit node;

inserting register moving instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register moving instructions are inserted at a starting node of the one or more H pathways, and wherein the register moving instructions comprise instructions to move a symbolic register r to a corresponding symbolic register r′; and

inserting register merging instructions at an ending node of the one or more H pathways, wherein the register merging instructions comprise instructions to move the symbolic register r′ to the symbolic register r.

2. The method of claim 1 , wherein a node has high register pressure when the node uses more symbolic registers than hardware registers present in a processor, and wherein a node has low register pressure when the node uses no more symbolic registers than there are hardware registers.

3. The method of claim 1 , wherein the one or more H pathways are identified using a backwards data flow to determine the nodes in which each symbolic register is live.

4. The method of claim 1 , wherein the L pathway is identified using a depth first search starting at the entry node and recursively locating the L nodes of the L pathway.

5. The method of claim 1 , further comprising determining that a symbolic register is live when the symbolic register is used inside of a node.

6. A computer system for splitting live register ranges, the computer system comprising:

one or more computer processors;

one or more computer readable storage media;

program instructions stored therein for execution by at least one of the one or more computer processors, the program instructions comprising instructions to:

identify one or more H pathways comprising one or more H nodes of a plurality of nodes, wherein at least one of the one or more H nodes has a high register pressure;

identify an L pathway consisting of two or more L nodes of the plurality of nodes, the L pathway having an entry node and exit node;

insert register moving instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register moving instructions are inserted at a starting node of the one or more H pathways, and wherein the register moving instructions comprise instructions to move a symbolic register r to a corresponding symbolic register r′; and

insert register merging instructions at an ending node of the one or more H pathways, wherein the register merging instructions comprise instructions to move the symbolic register r′ to the symbolic register r.

7. The computer system of claim 6 , wherein a node has high register pressure when the node uses more symbolic registers than hardware registers present in the computer processor, and wherein a node has low register pressure when the node uses no more symbolic registers than there are hardware registers.

8. The computer system of claim 6 , wherein the one or more H pathways are identified using a backwards data flow to determine the nodes in which each symbolic register is live.

9. The computer system of claim 6 , wherein the L pathway is identified using a depth first search starting at the entry node and recursively locating the L nodes of the L pathway.

10. The computer system of claim 6 , further comprising instructions to determine that a symbolic register is live when the symbolic register is used inside of a node.

11. A computer program product for splitting live register ranges, the computer program product comprising:

a computer readable storage medium and program instructions stored on the computer readable storage medium, the program instructions comprising instructions to:

identify one or more H pathways comprising one or more H nodes of a plurality of nodes, wherein at least one of the one or more H nodes has a high register pressure;

identify an L pathway consisting of two or more L nodes of the plurality of nodes, the L pathway having an entry node and exit node;

insert register moving instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register moving instructions are inserted at a starting node of the one or more H pathways, and wherein the register moving instructions comprise instructions to move a symbolic register r to a corresponding symbolic register r′; and

insert register merging instructions at an ending node of the one or more H pathways, wherein the register merging instructions comprise instructions to move the symbolic register r′ to the symbolic register r.

12. The computer program product of claim 11 , wherein a node has high register pressure when the node uses more symbolic registers than hardware registers present in a computer processor, and wherein a node has low register pressure when the node uses no more symbolic registers than there are hardware registers.

13. The computer program product of claim 11 , wherein the one or more H pathways are identified using a backwards data flow to determine the nodes in which each symbolic register is live.

14. The computer program product of claim 11 , further comprising instructions to determine that a symbolic register is live when the symbolic register is used inside of a node.