Voltage regulator
View Patent ↗Provided is a voltage regulator having satisfactory transient response characteristics. The voltage regulator includes: a first amplifier for detecting that undershoot occurs in an output voltage; a second amplifier for detecting that overshoot occurs in the output voltage; a first constant current circuit for increasing a bias current of an error amplifier circuit by a first amount for a first time period in response to a signal determined based on one of an output signal of the first amplifier and an output signal of the second amplifier; a second constant current circuit for increasing the bias current of the error amplifier circuit by a second amount larger than the first amount for a second time period shorter than the first time period in response to a signal determined based on the output signal of the first amplifier; and a first switch circuit for pulling up a gate of an output transistor in response to a signal determined based on the output signal of the second amplifier.
1. A voltage regulator, comprising:
an error amplifier circuit for amplifying a difference between a probe voltage proportional to an output voltage outputted from an output transistor and a predetermined reference voltage, and for outputting the amplified difference to a gate of the output transistor to maintain the output voltage from the output transistor at a constant level, wherein the error amplifier circuit is configured to receive a bias current and increase a responsiveness thereof as the received bias current increases, whereas decreasing the responsiveness thereof as the received bias current decreases;
an overshoot detecting circuit comprising an auxiliary amplifier for detecting an occurrence of an overshoot in the output voltage, wherein the overshoot detecting circuit is configured to turn on an overshoot detecting signal at a beginning of the detected overshoot and turn off the overshoot detecting signal at an end of the detected overshoot;
a delay circuit triggered by the overshoot detecting signal from the overshoot detecting circuit to start outputting an activation signal at the beginning of the detected overshoot, wherein the delay circuit is configured to maintain outputting the activation signal during a time duration from the beginning of the detected overshoot until a predetermined delay time after the overshoot detecting circuit turns off the overshoot detecting signal;
a first constant current circuit activated by the activation signal from the delay circuit to increase the bias current of the error amplifier circuit for a predetermined time period at least as long as the activation signal is turned on to increase the responsiveness of the error amplifier circuit for a certain time duration after the end of the detected overshoot to suppress an oscillation of the output voltage from the output transistor; and
a switch circuit for pulling up the gate of the output transistor in response to the overshoot detecting signal from the auxiliary amplifier.