IP Library Granted Patent US 10,101,934
Granted Patent B1
US 10,101,934 · App. 15/079,213 · Granted Oct 16, 2018

Memory allocation balancing for storage systems

Inventors: Tal Ben-Moshe (Kiryat Ono, IL); Eli Dorfman (Raanana, IL); Kirill Shoikhet (Raanana, IL); David Krakov (Ramat Gan, IL); Roman Vainbrand (Kfar Saba, IL); Noa Cohen (Tel Avivi, IL)
Assignee: EMC Corporation
G06F3/0631G06F3/0604G06F3/0673G06F12/0646G06F2212/1008G06F2212/657
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Quick Facts
Patent No.
US 10,101,934
App. No.
15/079,213
Granted
Oct 16, 2018
Kind
B1
Abstract

Described herein are embodiments of a process that can be used to balance the allocation of primary memory between different types of information. In some embodiments, the memory allocation is balanced dynamically based on observed I/O patterns. Related system embodiments are also described.

Claims (46)

1. A method comprising:

calculating a relationship of a first number of read operations and a second number of write operations of a plurality of I/O operations made to a storage system having a volatile memory;

selecting a memory allocation scheme based upon the relationship of the first number of read operations and the second number of write operations; and

applying the memory allocation scheme, wherein applying the memory allocation scheme comprises allocating capacity of the volatile memory based upon the selected allocation scheme,

wherein calculating the relationship of the first number of read operations and the second number of write operations comprises calculating a moving average of the relationship of the first number of read operations and the second number of write operations.

2. The method of claim 1 wherein selecting a memory allocation scheme is further based upon moving averages of read I/O latency and write I/O latency.

3. The method of claim 1 further comprising, according to the selected memory allocation scheme:

allocating a first amount of volatile memory as a metadata cache; and

allocating a second amount of volatile memory as a journal.

4. The method of claim 3 further comprising:

mapping logical block addresses (LBA) of the storage system to chunk hashes; and

mapping the chunk hashes to physical storage locations on storage devices of the storage system.

5. The method of claim 1 further comprising de-allocating capacity of the volatile memory based upon the selected allocation scheme.

6. The method of claim 1 wherein applying the memory allocation scheme further comprises determining if the memory allocation scheme should be applied.

7. The method of claim 6 further comprising:

using hysteresis to determine if the memory allocation scheme should be applied.

8. The method of claim 1 wherein calculating the relationship of the first number of read operations and the second number of write operations comprises calculating a ratio of the first number of read operations and the second number of write operations, the method further comprising:

selecting a first memory allocation scheme if the ratio exceeds a first threshold;

selecting a second memory allocation scheme if the ratio exceeds a second threshold; and

selecting a third memory allocation scheme if the ratio exceeds neither the first threshold nor the second threshold.

9. A system comprising:

a processor;

a volatile memory; and

a non-volatile memory storing computer program code that when executed on the processor causes the processor to execute a process operable to perform the operations of:

calculating a relationship between a first number of read operations and a second number of write operations of a plurality of I/O operations to a storage system having a volatile memory;

selecting a memory allocation scheme based on the relationship of the first number of read operations and the second number of write operations; and

applying the selected memory allocation scheme, wherein applying the selected memory allocation scheme comprises allocating capacity of the volatile memory based upon the selected memory allocation scheme,

wherein calculating the relationship of the first number of read operations and the second number of write operations comprises calculating a moving average of the relationship of the first number of read operations and the second number of write operations.

10. The system of claim 9 wherein the computer program code causes the processor to execute a process operable to select the memory allocation scheme further based upon a moving averages of read latency and write latency.

11. The system of claim 9 wherein the computer program code causes the processor to execute a process operable to:

allocate a first amount of volatile memory as a metadata cache according to the selected memory allocation scheme; and

allocate a second amount of volatile memory as a journal according to the selected memory allocation scheme.

12. The system of claim 11 wherein the metadata includes a logical block address (LBA) to chunk hash mapping and a chunk hash to storage location mapping.

13. The system of claim 9 wherein the computer program code causes the processor to execute a process further operable to de-allocate capacity of the volatile memory based upon the selected allocation scheme.

14. The system of claim 9 wherein the computer program code causes the processor to execute a process further operable to determine if the memory allocation scheme should be applied.

15. The system of claim 14 wherein the computer program code causes the processor to execute a process further operable to:

use hysteresis to determine if the memory allocation scheme should be applied.

16. The system of claim 9 wherein the computer program code causes the processor to execute a process operable to calculate the relationship of the first number of read operations and the second number of write operations by calculating a ratio of the first number of read operations and the second number of write operations, the method further comprising and further operable to:

select a first memory allocation scheme if the ratio exceeds a first threshold;

select a second memory allocation scheme if the ratio exceeds a second threshold; and

select a third memory allocation scheme if the ratio exceeds neither the first threshold nor the second threshold.

17. A computer program product tangibly embodied in a non-transitory computer-readable medium, the computer-readable medium storing program instructions that are executable to:

calculate a relationship of a first number of read operations and a second number of write operations of a plurality of I/O operations made to a storage system having a volatile memory;

select a memory allocation scheme based upon the relationship of the first number of read operations and the second number of write operations; and

applying the selected memory allocation scheme, wherein applying the memory allocation scheme comprises allocating capacity of the volatile memory based upon selected allocation scheme,

wherein calculating the relationship of the first number of read operations and the second number of write operations comprises calculating a moving average of the relationship of the first number of read operations and the second number of write operations.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2016
From: BEN-MOSHE, TAL; DORFMAN, ELI; SHOIKHET, KIRILL; KRAKOV, DAVID; VAINBRAND, ROMAN; COHEN, NOA
To: EMC CORPORATION
Reel/Frame 038207/0582 →
Cited By (5)
US 12,271,622 US 12,443,533 US 12,475,045 US 12,566,700 US 12,650,772