Clock signal generating circuit and operating method thereof
An operating method of a clock signal generating circuit includes the following operations: transmitting a clock signal to a clock tree circuit by a voltage detector; and adjusting a frequency of the clock signal according to a voltage of the clock tree circuit so as to maintain the voltage within a voltage range.
1. An operating method of a clock signal generating circuit, comprising:
transmitting a clock signal to a clock tree circuit by a voltage detector; and
adjusting a frequency of the clock signal according to a voltage of the clock tree circuit so as to maintain the voltage within a voltage range.
2. The operating method of claim 1 , further comprising:
increasing the frequency of the clock signal when the voltage is higher than a voltage upper threshold; and
decreasing the frequency of the clock signal when the voltage is lower than a voltage lower threshold.
3. The operating method of claim 1 , wherein the voltage is an operating voltage of the clock tree circuit.
4. The operating method of claim 1 , further comprising:
generating the clock signal by a signal generating circuit.
5. The operating method of claim 1 , further comprising:
detecting the voltage of the clock tree circuit by the voltage detector.
6. A clock signal generating circuit, comprising:
a clock tree circuit; and
a voltage detector, coupled to the clock tree circuit, wherein the voltage detector is configured to transmit a clock signal to the clock tree circuit;
wherein the voltage detector adjusts a frequency of the clock signal according to a voltage of the clock tree circuit so as to maintain the voltage within a voltage range.
7. The clock signal generating circuit of claim 6 , wherein the voltage detector is further configured to increase the frequency of the clock signal when the voltage is higher than a voltage upper threshold, and the voltage detector is configured to decrease the frequency of the clock signal when the voltage is lower than a voltage lower threshold.
8. The clock signal generating circuit of claim 6 , wherein the voltage is an operating voltage of the clock tree circuit.
9. The clock signal generating circuit of claim 6 , wherein the voltage detector comprises:
a signal generating circuit, configured to generate the clock signal.
10. The clock signal generating circuit of claim 6 , wherein the voltage detector is further configured to detect the voltage of the clock tree circuit.