Application of duty cycle correction to a level shifter via a feedback common mode resistor
Systems, apparatuses, and methods for applying duty cycle correction to a level shifter via a feedback common mode resistor are disclosed. A circuit includes a capacitor, an inverter, and at least one feedback resistor. An input signal is received and coupled through the capacitor to the inverter. To correct for duty cycle distortion on the input signal, a duty cycle correction signal is applied to the at least one feedback resistor in the feedback path. The duty cycle correction signal can be applied as a voltage or as a current. In one implementation, the location of the injection point for applying the duty cycle correction signal within the at least one feedback resistor is programmable.
1. A circuit comprising:
a first capacitor;
a first inverter; and
a first feedback resistor;
wherein the circuit is configured to:
receive a first input signal at an input of the first capacitor;
couple the first input signal from an output of the first capacitor to an input of the first inverter, wherein an output of the first inverter is connected back to the input of the first inverter via the first feedback resistor; and
apply a first duty cycle correction signal within the first feedback resistor to correct for duty cycle distortion of the first input signal.
2. The circuit as recited in claim 1 , wherein the duty cycle correction signal is a voltage.
3. The circuit as recited in claim 1 , wherein the duty cycle correction signal is a current.
4. The circuit as recited in claim 1 , wherein the circuit further comprises:
a second capacitor;
a second inverter; and
a second feedback resistor;
wherein the circuit is configured to:
receive a second input signal at an input of the second capacitor;
couple the second input signal from an output of the second capacitor to an input of the second inverter, wherein an output of the second inverter is connected back to the input of the second inverter via the second feedback resistor; and
apply a second duty cycle correction signal within the second feedback resistor to correct for duty cycle distortion of the second input signal, wherein an amplitude of the second duty cycle correction signal is a reciprocal of an amplitude of the first duty cycle correction signal.
5. The circuit as recited in claim 4 , wherein the first and second input signals are components of a given differential signal.
6. The circuit as recited in claim 1 , wherein the circuit is further configured to apply the first duty cycle correction signal to a given tapping point within the first feedback resistor, and wherein a location of the given tapping point within the first feedback resistor is programmable.
7. The circuit as recited in claim 1 , wherein the circuit is configured to convey a duty cycle corrected signal on the output of the first inverter to a second inverter.
8. A method comprising:
receiving a first input signal on an input of a first capacitor;
coupling the first input signal from an output of the first capacitor to an input of a first inverter, wherein an output of the first inverter is connected back to the input of the first inverter via a first feedback resistor; and
applying a first duty cycle correction signal within the first feedback resistor to correct for duty cycle distortion of the first input signal.
9. The method as recited in claim 8 , wherein the duty cycle correction signal is a voltage.
10. The method as recited in claim 8 , wherein the duty cycle correction signal is a current.
11. The method as recited in claim 8 , further comprising:
receiving a second input signal on an input of a second capacitor;
coupling the second input signal from an output of the second capacitor to an input of a second inverter, wherein an output of the second inverter is connected back to the input of the second inverter via a second feedback resistor; and
applying a second duty cycle correction signal within the second feedback resistor to correct for duty cycle distortion of the second input signal, wherein an amplitude of the second duty cycle correction signal is a reciprocal of an amplitude of the first duty cycle correction signal.
12. The method as recited in claim 11 , wherein the first and second input signals are components of a given differential signal.
13. The method as recited in claim 8 , further comprising applying the first duty cycle correction signal to a given tapping point within the first feedback resistor, wherein a location of the given tapping point within the first feedback resistor is programmable.
14. The method as recited in claim 8 , further comprising conveying a duty cycle corrected signal on the output of the first inverter to a second inverter.
15. A circuit comprising:
a first inverter; and
a first feedback resistor;
wherein the circuit is configured to:
receive a first input signal on an input of the first inverter, wherein an output of the first inverter is connected back to the input of the first inverter via the first feedback resistor; and
apply a first duty cycle correction signal within the first feedback resistor to correct for duty cycle distortion of the first input signal.
16. The circuit as recited in claim 15 , wherein the duty cycle correction signal is a voltage.
17. The circuit as recited in claim 15 , wherein the duty cycle correction signal is a current.
18. The circuit as recited in claim 15 , wherein the circuit further comprises:
a second inverter; and
a second feedback resistor;
wherein the circuit is configured to:
receive a second input signal on an input of the second inverter, wherein an output of the second inverter is connected back to the input of the second inverter via the second feedback resistor; and
apply a second duty cycle correction signal within the second feedback resistor to correct for duty cycle distortion of the second input signal, wherein an amplitude of the second duty cycle correction signal is a reciprocal of an amplitude of the first duty cycle correction signal.
19. The circuit as recited in claim 18 , wherein the first and second input signals are components of a given differential signal.
20. The circuit as recited in claim 15 , wherein the circuit is further configured to apply the first duty cycle correction signal to a given tapping point within the first feedback resistor, wherein a location of the given tapping point within the first feedback resistor is programmable.