IP Library Granted Patent US 10,691,806
Granted Patent B2
US 10,691,806 · App. 16/149,973 · Granted Jun 23, 2020

Self-measuring nonvolatile memory device systems and methods

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Quick Facts
Patent No.
US 10,691,806
App. No.
16/149,973
Granted
Jun 23, 2020
Kind
B2
Abstract

One embodiment describes a computing system that includes a boot device. The boot device includes nonvolatile memory that stores startup routine instructions and a first pointer, in which the first pointer identifies a first one or more memory addresses in the nonvolatile memory where at least a portion of the startup routine instructions are stored, and a microcontroller that retrieves the startup routine instructions from the nonvolatile memory using the first pointer and determines whether the startup routine instructions are corrupted before executing any portion of the startup routine instructions. The computing system further includes a central processor communicatively coupled to the boot device, in which the central processor executes the startup routine instructions to initialize the computing system when the microcontroller determines that the startup routine instructions are not corrupted.

Claims (86)

1. A boot device configured to facilitate initializing a computing system, comprising:

memory configured to store startup routine instructions and a first pointer, wherein the first pointer identifies at least a portion of the startup routine instructions in the memory; and

control logic communicatively coupled to the memory, wherein the control logic is configured to:

retrieve the startup routine instructions from the memory based at least in part on the first pointer;

determine whether the startup routine instructions are expected to be corrupted before execution of the startup routine instructions by the computing system; and

communicate the startup routine instructions to a processor of the computing system when the startup routine instructions are not expected to be corrupted to facilitate initializing the computing system by executing the startup routine instructions.

2. The boot device of claim 1 , wherein, when the startup routine instructions are updated, the control logic is configured to:

receive a pointer update instruction and a first signature, wherein:

the pointer update instructions instructs the control logic to adjust a size parameter, an address parameter, or both of the first pointer; and

the first signature is determined by performing a cryptographic hash on the pointer update instruction based at least in part on a cryptographic key;

perform the cryptographic hash on the pointer update instruction based at least in part on the cryptographic key to determine a first hash result; and

adjust the size parameter, the address parameter, or both of the first pointer based at least in part on the pointer update instruction only after determining that the first hash result matches the first signature.

3. The boot device of claim 2 , wherein, when the startup routine instructions are updated, the control logic is configured to:

receive a start pointer update instruction and a second signature before the pointer update instruction, wherein the second signature is determined by performing the cryptographic hash on the start pointer update instruction based at least in part on the cryptographic key;

perform the cryptographic hash on the start pointer update instruction based at least in part on the cryptographic key to determine a second hash result;

receive a finish pointer update instruction and a third signature after the pointer update instruction, wherein the third signature is determined by performing the cryptographic hash on the finish pointer update instruction based at least in part on the cryptographic key;

perform the cryptographic hash on the finish pointer update instruction based at least in part on the cryptographic key to determine a third hash result; and

finalize adjustment of the size parameter, the address parameter, or both only after determining that the second hash result matches the second signature and that the third has result matches the third signature.

4. The boot device of claim 1 , wherein the memory comprises a pointer register that stores the first pointer and a second pointer, wherein:

the first pointer indicates location of a first portion of the startup routine instructions in the memory; and

the second pointer indicates location of a second portion of the startup routine instructions in memory.

5. The boot device of claim 4 , wherein, to retrieve the startup routine instructions, the control logic is configured to:

retrieve the first portion of the startup routine instructions based at least in part on the first pointer;

retrieve the second portion of the startup routine instructions based at least in part on the second pointer; and

link the first portion with the second portion of the startup routine instructions based at least in part on organization of the first pointer and the second pointer in the pointer register.

6. The boot device of claim 4 , wherein, to determine whether the startup routine instructions are expected to be corrupted, the control logic is configured to:

perform a cryptographic hash on the first portion of the startup routine instructions; and

determine that the first portion of the startup routine instructions is not expected to be corrupted when a result of the cryptographic hash matches an expected result, wherein the control logic is configured to retrieve the second portion of the startup routine instructions only after determining that the first portion of the startup routine instructions is not expected to be corrupted.

7. The boot device of claim 1 , wherein the memory is configured to:

store a first portion of the startup routine instructions in a first block of contiguous memory addresses in the memory; and

store a second portion of the startup routine instructions in a second block of contiguous memory addresses in the memory, wherein the first block and the second block are non-contiguous blocks in the memory.

8. The boot device of claim 1 , wherein, to communicate the startup routine instructions to the processor, the control logic is configured to:

perform a cryptographic hash on the startup routine instructions based at least in part on a cryptographic key and a nonce to determine a signature; and

output the startup routine instructions along with the signature to a bus communicatively coupled between the boot device and the processor to enable the processor to verify the startup routine instructions based at least in part on the signature before executing the startup routine instructions.

9. The boot device of claim 1 , wherein, to determine whether the startup routine instructions are expected to be corrupted, the control logic is configured to execute microcode to:

perform a cryptographic hash on the startup routine instructions to determine a hash result; and

determine that the startup routine instructions are not expected to be corrupted when the hash result matches an expected result.

10. A computing system, comprising:

a data bus configured to be communicatively coupled to a boot device that stores startup routine instructions in nonvolatile memory and a first pointer that identifies a first one or more memory addresses in the nonvolatile memory where at least a portion of the startup routine instructions is stored; and

a processor communicatively coupled to the data bus, wherein the processor is configured to:

receive the startup routine instructions along with a signature from the boot device when the boot device, without executing any portion of the startup routine instructions, determines that the startup routine instructions are not expected to be corrupted;

perform a cryptographic hash on the startup routine instructions to determine a first hash result; and

initialize the computing system by executing the startup routine instructions when the first hash result matches the signature.

11. The computing system of claim 10 , wherein the boot device is configured to execute microcode to:

retrieve the startup routine instructions from the nonvolatile memory based at least in part on the first pointer;

perform the cryptographic hash on the startup routine instructions based at least in part on a cryptographic key to determine a second hash result; and

determine that the startup routine instructions are not expected to be corrupted when the second hash result matches an expected result.

12. The computing system of claim 11 , wherein, when the startup routine instructions are not expected to be corrupted, the boot device is configured to execute the microcode to:

determine the signature by performing the cryptographic hash on the startup routine instructions based at least in part on the cryptographic key and a nonce; and

communicate the nonce along with the startup routine instructions to the processor to enable the processor to verify originality of the startup routine instructions.

13. The computing system of claim 10 , wherein, to determine a first hash result, the processor is configured to perform the cryptographic hash on the startup routine instructions based at least in part on a cryptographic key and a nonce to verify identity of the boot device and originality of the startup routine instructions.

14. The computing system of claim 10 , wherein the processor is configured to execute the startup routine instructions to:

identify devices in the computing system;

test the devices in the computing system;

initialize the devices in the computing system;

load instructions to be subsequently executed by the computing system;

test the instructions to determine whether the instructions have been undesirably modified; or

any combination thereof.

15. A method, comprising:

updating, using the one or more processors, startup routine instructions stored in nonvolatile memory of a boot device;

determining, using the one or more processors, a first pointer update instruction that instructs the boot device to update a first pointer to identify at least a first portion of the startup routine instructions in the nonvolatile memory after the startup routine instructions are updated;

determining, using the one or more processors, a first signature by performing a cryptographic hash on the first pointer update instruction; and

communicating, using the one or more processors, the first signature along with the first pointer update instruction to the boot device to enable the boot device to update the first pointer only after the boot device verifies the first pointer update instruction based at least in part on the first signature.

16. The method of claim 15 , wherein updating the startup routine instructions comprises:

fixing a bug in the startup routine instructions;

adjusting functionality provided by executing the startup routine instructions; or

both.

17. The method of claim 15 , wherein determining the first pointer update instruction comprises:

determining a starting memory address in the nonvolatile memory where the first portion of the startup routine instructions is stored;

determining number of contiguous memory address in the nonvolatile memory used to store the first portion of the startup routine instructions; and

determining the first pointer update instruction to instruct the boot device to:

adjust an address parameter of the first pointer based at least in part on the starting memory address;

adjust a size parameter of the first pointer based at least in part on the number of contiguous memory addresses; or

both.

18. The method of claim 15 , comprising:

determining, using the one or more processors, a second pointer update instruction that instructs the boot device to update a second pointer to identify a second portion of the startup routine instructions in the nonvolatile memory after the startup routine instructions are updated;

determining, using the one or more processors, a second signature by performing the cryptographic hash on the second pointer update instruction; and

communicating, using the one or more processors, the second signature along with the second pointer update instruction to the boot device to enable the boot device to update the second pointer only after the boot device verifies the second pointer update instruction based at least in part on the second signature.

19. The method of claim 15 , comprising:

determining, using the one or more processors, a start pointer update instruction that instructs the boot device to initialize pointer updating;

determining, using the one or more processors, a second signature by performing the cryptographic hash on the start pointer update instruction; and

communicating, using the one or more processors, the second signature along with the start pointer update instruction to the boot device before the first pointer update instruction to enable the boot device to update the first pointer only after the boot device verifies the start pointer update instruction based at least in part on the second signature.

20. The method of claim 15 , comprising:

determining, using the one or more processors, a finish pointer update instruction that instructs the boot device to finalize pointer updating;

determining, using the one or more processors, a second signature by performing the cryptographic hash on the finish pointer update instruction; and

communicating, using the one or more processors, the second signature along with the finish pointer update instruction to the boot device after the first pointer update instruction to enable the boot device to restore the first pointer to a previous version when the boot device is unable to verify the finish pointer update based at least in part on the second signature.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051028/0835 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050719/0550 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.., AS COLLATERAL AGENT
Reel/Frame 047630/0756 →
SUPPLEMENT NO. 10 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048102/0420 →