IP Library Granted Patent US 10,756,136
Granted Patent B1
US 10,756,136 · App. 16/591,734 · Granted Aug 25, 2020

Display panel and display device

Inventors: Yangzhao Ma (Wuhan, CN); Xingxing Yang (Wuhan, CN); Dongliang Dun (Wuhan, CN)
H01L27/156H01L27/3227H01L31/147
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Quick Facts
Patent No.
US 10,756,136
App. No.
16/591,734
Granted
Aug 25, 2020
Kind
B1
Abstract

Provided are a display panel and display device. The display panel includes a first display area and a second display area adjacent to the first display area. The second display area is reused as a sensor reservation area. The second display area includes a plurality of light-transmissive areas and a plurality of pixel unit setting areas. A first trace area is disposed between two adjacent pixel unit setting areas in a first direction, a second trace area is disposed between two adjacent pixel unit setting areas in a second direction, and the first direction intersects with the second direction. The display panel further includes a base substrate and a light-blocking layer. The light-blocking layer is electrically connected to a preset voltage terminal.

Claims (51)

1. A display panel, comprising a first display area and a second display area adjacent to the first display area, wherein the second display area is reused as a sensor reservation area, and the second display area comprises a plurality of light-transmissive areas and a plurality of pixel unit setting areas; and

a first trace area is disposed between two adjacent pixel unit setting areas in a first direction, a second trace area is disposed between two adjacent pixel unit setting areas in a second direction, and the first direction intersects with the second direction; and

wherein the display panel further comprises:

a base substrate, and

a light-blocking layer, wherein the light-blocking layer is electrically connected to a preset voltage terminal, and along a direction perpendicular to a plane in which the base substrate is located, projections of a gap between two adjacent first traces in the first trace area and a gap between two adjacent second traces in the second trace area on the base substrate are completely covered by a projection of the light-blocking layer on the base substrate.

2. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;

each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises an anode, a light-emitting layer and a cathode that are sequentially stacked;

a first trace is disposed on one side of the second trace facing towards the anode; and

the light-blocking layer is disposed between a film layer where the first trace is located and a film layer where the anode is located.

3. The display panel of claim 1 , wherein the base substrate comprises a flexible substrate,

wherein the flexible substrate comprises a first flexible substrate and a second flexible substrate; and

wherein the light-blocking layer is disposed between the first flexible substrate and the second flexible substrate.

4. The display panel of claim 2 , wherein the light-blocking layer comprises a plurality of first light-blocking portions for covering the first trace area, a plurality of second light-blocking portions for covering the second trace area, and a third light-blocking portion for covering the plurality of pixel unit setting areas;

wherein the first display area comprises a plurality of first power voltage lines extending in the first direction and the second direction, the plurality of first light-blocking portions and the plurality of second light-blocking portions extend to the first display area, both the plurality of first light-blocking portions and the plurality of second light-blocking portions are electrically connected to the plurality of first power voltage lines, and the plurality of first light-blocking portions, the plurality of second light-blocking portions and the third light-blocking portion are connected to each other; and

wherein the preset voltage terminal is a power voltage terminal.

5. The display panel of claim 3 , wherein the light-blocking layer comprises a plurality of first light-blocking portions for covering the first trace area, a plurality of second light-blocking portions for covering the second trace area, and a third light-blocking portion for covering the plurality of pixel unit setting areas;

wherein the first display area comprises a plurality of first power voltage lines extending in the first direction and the second direction, the plurality of first light-blocking portions and the plurality of second light-blocking portions extend to the first display area, both the plurality of first light-blocking portions and the plurality of second light-blocking portions are electrically connected to the plurality of first power voltage lines, and the plurality of first light-blocking portions, the plurality of second light-blocking portions and the third light-blocking portion are connected to each other; and

wherein the preset voltage terminal is a power voltage terminal.

6. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;

wherein each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises an anode, a light-emitting layer and a cathode that are sequentially stacked; and

wherein the light-blocking layer and the anode are disposed in a same layer.

7. The display panel of claim 6 , wherein each of the plurality of pixel unit setting areas comprise a driving circuit setting area;

wherein the light-blocking layer comprises a fourth light-blocking portion for covering the first trace area, a fifth light-blocking portion for covering the second trace area and a sixth light-blocking portion for covering the driving circuit setting area;

wherein the first display area comprises a plurality of preset voltage lines extending in the first direction and the second direction, the fourth light-blocking portion and the fifth light-blocking portion extend to the first display area, both the fourth light-blocking portion and the fifth light-blocking portion are electrically connected to the plurality of preset voltage lines, and the fourth light-blocking portion, the fifth light-blocking portion and the sixth light-blocking portion are connected to each other; and

wherein the preset voltage terminal is a power voltage terminal or a ground terminal.

8. The display panel of claim 7 , wherein the preset voltage terminal is a power voltage terminal, and the plurality of preset voltage lines are second power voltage lines; and

wherein the second display area further comprises a plurality of third power voltage lines extending in the first direction and the second direction, and the plurality of third power voltage lines are electrically connected to the second power voltage lines.

9. The display panel of claim 1 , wherein along the direction perpendicular to the plane in which the base substrate is located, projections of the first trace area and the second trace area on the base substrate are completely covered by the orthographic projection of the light-blocking layer on the base substrate.

10. The display panel of claim 1 , wherein along the direction perpendicular to the plane in which the base substrate is located, projections of the first trace area, the second trace area and the pixel unit setting area on the base substrate are completely covered by the orthographic projection of the light-blocking layer on the base substrate.

11. The display panel of claim 1 , wherein the light-blocking layer comprises a metal light-blocking layer.

12. The display panel of claim 1 , further comprising a cathode layer, wherein the cathode layer comprises a plurality of openings in the second display area, and orthographic projections of the plurality of openings on the base substrate at least partially coincide with orthographic projections of the plurality of light-transmissive areas on the base substrate.

13. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;

each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises a Micro-light-emitting diode (LED) or an organic light-emitting diode.

14. The display panel of claim 1 , wherein the first display area comprises a plurality of first pixel units arranged in an array, and the second display area comprises a plurality of second pixel units arranged in an array; and

a pixel unit density of the first display area is greater than a pixel unit density of the second display area.

15. The display panel of claim 14 , wherein the pixel unit density of the first display area is 4 to 12 times the pixel unit density of the second display area.

16. The display panel of claim 1 , wherein the first display area comprises a plurality of first pixel units arranged in an array, and each of the plurality of first pixel units comprises a plurality of first sub-pixels of different light-emitting colors; and wherein the second display area comprises a plurality of second pixel units arranged in an array, and each of the plurality of second pixel units comprises a plurality of second sub-pixels of different light-emitting colors; and

a sub-pixel density of the first display area is greater than a sub-pixel density of the second display area.

17. The display panel of claim 1 , wherein the first display area comprises a plurality of first pixel units arranged in an array, and the second display area comprises a plurality of second pixel units arranged in an array; and

an area of each of the plurality of first pixel units on the base substrate is greater than an area of each of the plurality of second pixel units on the base substrate.

18. The display panel of claim 17 , wherein each of the plurality of first pixel units comprise a first driving circuit, each of the plurality of second pixel units comprise a second driving circuit, and a projected area of the first driving circuit on the base substrate is greater than a projected area of the second driving circuit on the base substrate.

19. The display panel of claim 1 , wherein a distance between two adjacent pixel unit setting areas in the first direction in the second display area is d 1 , a distance between two adjacent pixel unit setting areas in the second direction is d 2 , and d 1 is equal to d 2 .

20. A display device, comprising:

a display panel; and

a sensor module, which is disposed in a second display area of the display panel and located on one side of the base substrate facing away from a pixel, wherein a photosurface of the sensor module faces towards the display panel;

wherein the display panel comprises:

a first display area and a second display area adjacent to the first display area, wherein the second display area is reused as a sensor reservation area, and the second display area comprises a plurality of light-transmissive areas and a plurality of pixel unit setting areas; and

a first trace area is disposed between two adjacent pixel unit setting areas in a first direction, a second trace area is disposed between two adjacent pixel unit setting areas in a second direction, and the first direction intersects with the second direction; and

wherein the display panel further comprises:

a base substrate, and

a light-blocking layer, wherein the light-blocking layer is electrically connected to a preset voltage terminal, and along a direction perpendicular to a plane in which the base substrate is located, projections of a gap between two adjacent first traces in the first trace area and a gap between two adjacent second traces in the second trace area on the base substrate are completely covered by a projection of the light-blocking layer on the base substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2019
From: MA, YANGZHAO; YANG, XINGXING; DUN, DONGLIANG
To: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
Reel/Frame 050613/0979 →
Priority Claims (1)
CN 2019 1 0365397 · Apr 30, 2019 · national
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