Hybrid bonding using dummy bonding contacts
Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. The second semiconductor structure further includes a second bonding layer including second bonding contacts. At least one second bonding contact is in contact with a respective second interconnect. At least another second bonding contact is separated from the second interconnects. The semiconductor device further includes a bonding interface between the first and second bonding layers. Each first bonding contact is in contact with one of the second bonding contacts at the bonding interface.
1. A semiconductor device, comprising:
a first semiconductor structure comprising:
a first interconnect layer comprising a plurality of first interconnects; and
a first bonding layer comprising a plurality of first bonding contacts, each of the first interconnects being in contact with a respective one of the first bonding contacts;
a second semiconductor structure comprising:
a second interconnect layer comprising a plurality of second interconnects; and
a second bonding layer comprising a plurality of second bonding contacts, at least one of the second bonding contacts being in contact with a respective one of the second interconnects, and at least another one of the second bonding contacts separated from the second interconnects; and
a bonding interface between the first bonding layer and the second bonding layer,
wherein each of the first bonding contacts is in contact with one of the second bonding contacts at the bonding interface, and
wherein at least one of the second bonding contacts comprises a first portion farther from the bonding interface and having a first critical dimension, and a second portion closer to the bonding interface and having a second critical dimension larger than the first critical dimension, and wherein at least one of the first bonding contacts has a third critical dimension throughout.
2. The semiconductor device of claim 1 , wherein a number of the first bonding contacts is the same as a number of the first interconnects.
3. The semiconductor device of claim 2 , wherein the number of the first bonding contacts is smaller than a number of the second bonding contacts.
4. The semiconductor device of claim 1 , wherein each of the first bonding contacts has a nominally same critical dimension.
5. The semiconductor device of claim 1 , wherein the first and second bonding contacts comprise a pair of bonding contacts in contact with one another at the bonding interface, the pair of bonding contacts electrically connecting a respective pair of the first and second interconnects.
6. The semiconductor device of claim 1 , wherein the first and second bonding contacts comprise a pair of dummy bonding contacts in contact with one another at the bonding interface, the pair of dummy bonding contacts electrically connected to a respective first interconnect but not a second interconnect.
7. The semiconductor device of claim 1 , wherein at least one of the second bonding contacts is separated from the first bonding contacts at the bonding interface.
8. The semiconductor device of claim 1 , wherein the first bonding layer further comprises a first dielectric, and the second bonding layer further comprises a second dielectric in contact with the first dielectric at the bonding interface.
9. The semiconductor device of claim 1 , wherein one of the first semiconductor structure and the second semiconductor structure further comprises a device layer having a NAND memory string, and another one of the first semiconductor structure and the second semiconductor structure further comprises a device layer having a peripheral device.
10. A bonded structure, comprising:
a bonding interface;
a pair of functional bonding contacts in contact with one another at the bonding interface, wherein the pair of functional bonding contacts are in contact with a pair of interconnects on opposite sides of the bonding interface, respectively; and
a pair of dummy bonding contacts in contact with one another at the bonding interface, wherein the pair of dummy bonding contacts are in contact with an interconnect on one side of the bonding interface and separated from any interconnect on the opposite side of the bonding interface, and
wherein one of the dummy bonding contacts of the pair of dummy contacts comprises a first portion farther from the bonding interface and having a first critical dimension, and a second portion closer to the bonding interface and having a second critical dimension larger than the first critical dimension, and wherein another one of the pair of dummy bonding contacts has a third critical dimension throughout.
11. The bonded structure of claim 10 , further comprising a pair of dielectrics in contact with one another at the bonding interface.
12. The bonded structure of claim 10 , further comprising another dummy bonding contact at the bonding interface and separated from any interconnect on either side of the bonding interface.
13. A semiconductor device, comprising:
a first semiconductor structure comprising:
a first interconnect layer comprising a plurality of first interconnects; and
a first bonding layer comprising a plurality of first bonding contacts, each of the first interconnects being in contact with a respective one of the first bonding contacts;
a second semiconductor structure comprising:
a second interconnect layer comprising a plurality of second interconnects; and
a second bonding layer comprising a plurality of second bonding contacts, at least one of the second bonding contacts being in contact with a respective one of the second interconnects, and at least another one of the second bonding contacts separated from the second interconnects; and
a bonding interface between the first bonding layer and the second bonding layer,
wherein each of the first bonding contacts is in contact with one of the second bonding contacts at the bonding interface,
wherein the plurality of first bonding contacts comprise single damascene contacts,
wherein the plurality of second bonding contacts comprise dual damascene contacts, and
wherein at least one of the second bonding contacts is separated from all of the first bonding contacts at the bonding interface.
14. The semiconductor device of claim 13 , wherein a number of the first bonding contacts is the same as a number of the first interconnects.
15. The semiconductor device of claim 14 , wherein the number of the first bonding contacts is smaller than a number of the second bonding contacts.
16. The semiconductor device of claim 13 , wherein the first and second bonding contacts comprise a pair of bonding contacts in contact with one another at the bonding interface, the pair of bonding contacts electrically connecting a respective pair of the first and second interconnects.
17. The semiconductor device of claim 13 , wherein the first and second bonding contacts comprise a pair of dummy bonding contacts in contact with one another at the bonding interface, the pair of dummy bonding contacts electrically connected to a respective first interconnect but not a second interconnect.
18. The semiconductor device of claim 13 , wherein at least one of the second bonding contacts comprises a first portion having a first critical dimension and a second portion having a second critical dimension different from the first critical dimension.
19. The semiconductor device of claim 13 , wherein the first bonding layer further comprises a first dielectric, and the second bonding layer further comprises a second dielectric in contact with the first dielectric at the bonding interface.
20. The semiconductor device of claim 13 , wherein one of the first semiconductor structure and the second semiconductor structure further comprises a device layer having a NAND memory string, and another one of the first semiconductor structure and the second semiconductor structure further comprises a device layer having a peripheral device.