Implementing process, voltage, and/or temperature-insensitive resistance in complementary metal-oxide-semiconductors using a short-duty-clock cycle

1. A sensor system, comprising:

a short-duty-cycle clock; and

a switched-resistor circuit, wherein the short-duty cycle clock boosts a resistance level of the switched-resistor circuit to a defined resistance level, and wherein the short-duty-cycle clock comprises a short-duty-cycle clock generator comprising:

a programmable resistor-capacitor delay unit comprising a plurality of resistors and a plurality of switches,

a group of inverters, and

a NAND gate; and

wherein the switched-resistor circuit comprises:

a resistor, and

a set of switches, wherein the resistor and the set of switches are in a series configuration.

2. The sensor system of claim 1 , further comprising:

a temperature tracking clock generator that retains a constant frequency value over a plurality of temperature values.

3. The sensor system of claim 2 , wherein the constant frequency value improves an accuracy of a transfer function of the sensor system.

4. The sensor system of claim 1 , wherein the short-duty-cycle clock reduces a silicon area of the sensor system.

5. The sensor system of claim 1 , wherein the short-duty-cycle clock improves a linearity of the sensor system.

6. The sensor system of claim 1 , wherein the short-duty-cycle clock mitigates respective variations associated with process, voltage, and temperature of the sensor system.

7. The sensor system of claim 1 , wherein the group of inverters comprise a first inverter, a second inverter, and a third inverter, and wherein

a first input node of the first inverter is connected to an input signal and a first output node of the first inverter is connected to respective input nodes of the programmable resistor-capacitor delay unit;

a second input node of the second inverter is connected to an output node of the programmable resistor-capacitor delay unit, and a second output node of the second inverter is connected to a first input of the NAND gate; and

a third input node of the third inverter is connected to the input signal and a third output node of the third inverter is connected to a second input of the NAND gate.

8. The sensor system of claim 7 , wherein the set of switches comprise a first switch and a second switch located on opposite sides of the resistor in the series configuration.

9. The sensor system of claim 7 , wherein the short-duty-cycle clock generator controls the set of switches.

10. The sensor system of claim 7 , wherein the programmable resistor-capacitor delay unit controls a duty-cycle that tracks a variation of a resistance of the resistor over temperature.

11. A method, comprising:

boosting a resistance level of a switched-resistor circuit to a defined resistance level, wherein the boosting comprises using a short-duty-cycle clock to facilitate the boosting, wherein the switched-resistor circuit comprises a resistor and a set of switches, wherein the resistor and the set of switches are in a series configuration; and

retaining a constant frequency value over a plurality of temperature values.

12. The method of claim 11 , further comprising:

prior to the boosting the resistance level, operatively connecting the short-duty-cycle clock and the switched-resistor circuit.

13. The method of claim 11 , further comprising:

improving an accuracy of a transfer function of a sensor system based on the retaining.

14. The method of claim 11 , further comprising:

reducing a silicon area of a sensor system based on the using the short-duty-cycle clock.

15. The method of claim 11 , further comprising:

improving a linearity of a sensor system based on the using the short-duty-cycle clock.

16. The method of claim 11 , further comprising:

mitigating respective variations associated with process, voltage, and temperature of a sensor system based on the using the short-duty-cycle clock.