IP Library Granted Patent US 11,431,439
Granted Patent B1
US 11,431,439 · App. 17/301,713 · Granted Aug 30, 2022

Controller area network transceiver

Inventors: Bernd Uwe Gerhard Elend (Hamburg, DE); Rolf van de Burgt (Oosterbeek, NL); Franciscus Johannes Klösters (Schaijk, NL); Thierry G. C. Walrant (Bouge, BE)
Assignee: NXP B.V.
H04L1/004H04L1/0006H04L2001/0094
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Quick Facts
Patent No.
US 11,431,439
App. No.
17/301,713
Granted
Aug 30, 2022
Kind
B1
Abstract

A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver. The transceiver is configured to detect a CRC delimiter or an error signal in a CAN frame and after the detection, allow a microcontroller coupled with the microcontroller port to only send a predetermined data pattern until a bus idle is detected.

Claims (19)

1. A transceiver for sending and receiving data from a controller area network (CAN) bus, the transceiver includes a microcontroller port, a transmitter and a receiver, wherein the transceiver is configured to detect a CRC delimiter or an error signal in a CAN frame and after the detection, allow a microcontroller coupled with the microcontroller port to only send a predetermined data pattern until a bus idle is detected.

2. The transceiver of claim 1 , further configured to invalidate a data frame sent by the microcontroller by sending an error signal on the CAN bus if the data frame does not conform with the predetermined data pattern.

3. The transceiver of claim 2 , further configured to disable the transmitter for a predetermined period after invalidating the data frame.

4. The transceiver of claim 1 , wherein the predetermined data pattern includes a dominant bit followed by a recessive bit.

5. The transceiver of claim 1 , wherein the predetermined data pattern includes at least six dominant bits.

6. The transceiver of claim 1 , further configured to suppress a data frame sent by the microcontroller if a width of a bit in the data frame is smaller or broader than a predefined threshold.

7. The transceiver of claim 6 , wherein the predefined threshold is determined based on a data transmission rate.

8. The transceiver of claim 1 , wherein if the predetermined data pattern is repeated more than a predefined times after the detection of the CRC delimiter or the error signal, the transmitter is disabled for a preconfigured period of time.

9. The transceiver of claim 1 , further configured to allow any CAN conform data pattern after the detection of the bus idle and until a next CRC delimiter or a next error delimiter is detected.

10. A method for preventing a node from interrupting a communication on a controller area network (CAN) bus, the method comprising:

monitoring a CAN data frame on the CAN bus; and

detecting a CRC delimiter or an error signal in the CAN data frame and upon the detection allowing the node to only send a predetermined data pattern until a bus idle is detected.

11. The method of claim 10 , further including invalidating a data frame sent by the node by sending an error signal on the CAN bus if the data frame does not conform with the predetermined data pattern.

12. The method of claim 11 , further including disabling the node for a predetermined period after invalidating the data frame.

13. The method of claim 10 , wherein the predetermined data pattern includes a dominant bit followed by a recessive bit.

14. The method of claim 10 , wherein the predetermined data pattern includes at least six dominant bits.

15. The method of claim 10 , further including suppressing a data frame sent by the microcontroller if a width of a bit in the data frame is smaller or wider than a predefined threshold.

16. The method of claim 10 , further including allowing any CAN conform data pattern after the detection of the bus idle and until a next CRC delimiter or a next error delimiter is detected.

17. The method of claim 15 , wherein the predefined threshold is determined based on a data transmission rate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2021
From: ELEND, BERND UWE GERHARD; VAN DE BURGT, ROLF; KLÖSTERS, FRANCISCUS JOHANNES; WALRANT, THIERRY G. C.
To: NXP B.V.
Reel/Frame 055896/0465 →